1. 15 Jan, 2021 1 commit
  2. 16 Oct, 2020 2 commits
    • Raptor Engineering Development Team's avatar
      Add initial interrupt support for Microwatt in LiteX · c6240722
      There is a conflict between the LiteX way of doing things and the POWER
      way of handling interrupt tables.  LiteX expects to be able to put a ROM
      at address 0 and load an application into RAM at a higher address; POWER
      is architected to jump to exception handlers at 0x100...0x1000.
      
      As a result of this, we have taken the approach of placing generic exception
      handler entry / exit routines into ROM, and reserving a single pointer in
      SRAM to determine the C ISR handler location.  If no application is loaded,
      this pointer is set to the BIOS ROM ISR.  When an application loads, before
      reenabling interrupts, it needs to set __rom_isr_address to the address of
      the application's ISR, otherwise the BIOS ROM ISR will continue to be used.
      
      Tested to operate with the built-in UART in IRQ mode, both in BIOS and in
      loaded RAM application.
      c6240722
    • Raptor Engineering Development Team's avatar
  3. 01 Aug, 2020 3 commits
  4. 21 Jul, 2020 3 commits
  5. 20 Jul, 2020 7 commits
  6. 18 Jul, 2020 1 commit
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  8. 16 Jul, 2020 6 commits
  9. 15 Jul, 2020 8 commits
  10. 14 Jul, 2020 1 commit
  11. 13 Jul, 2020 1 commit
  12. 11 Jul, 2020 3 commits