Relicense FSI master/slave as BSD 3-clause in addition to AGPL v3

parent 90256ab4
BSD 3-Clause License
Copyright (c) 2020, Raptor Engineering, LLC
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
\ No newline at end of file
// © 2020 Raptor Engineering, LLC
//
// Released under the terms of the AGPL v3
// See the LICENSE file for full details
// Released under the BSD 3-Clause license
// See the LICENSE.fsi file for full details
//
// Alternatively, this file may be used under
// the terms of the AGPL v3. See the LICENSE
// file for full details.
module fsi_master_interface(
input wire [1:0] slave_id,
......@@ -922,4 +926,4 @@ module fsi_master_interface(
fsi_master_timeout_counter <= 0;
end
end
endmodule
\ No newline at end of file
endmodule
// © 2020 Raptor Engineering, LLC
//
// Released under the terms of the AGPL v3
// See the LICENSE file for full details
// Released under the BSD 3-Clause license
// See the LICENSE.fsi file for full details
//
// Alternatively, this file may be used under
// the terms of the AGPL v3. See the LICENSE
// file for full details.
module fsi_slave_interface(
input wire [1:0] slave_id, // Valid IDs are 0 - 3 inclusive
......@@ -811,4 +815,4 @@ module fsi_slave_interface(
fsi_data_in_internal_prev <= fsi_data_in_internal;
end
endmodule
\ No newline at end of file
endmodule
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