Fix FSI IRQ / DMA status internal register widths

parent 4466dd76
......@@ -110,8 +110,8 @@ module fsi_master_interface(
reg cycle_complete_reg = 0;
reg [2:0] cycle_error_reg = 0;
reg ipoll_error_reg = 0;
reg [1:0] interrupt_field_reg = 0;
reg [2:0] dma_control_field_reg = 0;
reg [7:0] interrupt_field_reg = 0;
reg [11:0] dma_control_field_reg = 0;
assign fsi_clock_out = peripheral_clock; // Clock is allowed to always run
assign fsi_data_out = ~fsi_data_reg; // FSI data line is electrically inverted
assign fsi_data_in_internal = ~fsi_data_in;
......
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