Skip to content
GitLab
Projects
Groups
Snippets
Help
Loading...
Help
Help
Support
Community forum
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
Open sidebar
Kestrel Collaboration
Kestrel Tooling
abc
Repository
2325cd77e3d6072b335dd551b3eda2ef20eaa92c
Switch branch/tag
abc
src
base
io
ioWriteVerilog.c
Find file
Blame
History
Permalink
Adding an option to write Verilog with LUT instances (compiler warnings).
· 2325cd77
Alan Mishchenko
authored
Oct 31, 2020
2325cd77
ioWriteVerilog.c
28.5 KB
Edit
Web IDE
Replace ioWriteVerilog.c
×
Attach a file by drag & drop or
click to upload
Commit message
Replace ioWriteVerilog.c
Replace file
Cancel
A new branch will be created in your fork and a new merge request will be started.