clock_generator.v · 19fb83111ab9d95eb36696089c50ac0800c6704e · Raptor Engineering Public Development / lpc-spi-bridge-fpga · GitLab

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Switch UART clock to derive from LPC clock · 19fb8311
Raptor Engineering Development Team authored May 03, 2020
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This avoids crossing clock domains and associated metastability
issues on the UART Wishbone interface.
```
19fb8311

clock_generator.v 3.38 KB

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