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  1. 19 Apr, 2013 2 commits
  3. 16 Mar, 2013 1 commit
    • Stefan Tauner's avatar
      Fix evil twins of Macronix MX25L1605, MX25L3205, MX25L6405 · 226037da
      Stefan Tauner authored 
      Similarly to the patch in r1647 this one updates the chips identified as above
with references to and data about their respective twins. Unlike previously this
one deals with the more evil details.

Helge Wagner from GE discovered some problems with chips sharing IDs
and proposed a patch to tackle (some of) them, see:
http://patchwork.coreboot.org/patch/3709/
That patch was bitrotting in our mailboxes for a long time and it is still not
ready for merge, but we increasingly get reports about problems (e.g.
http://paste.flashrom.org/view.php?id=1525

) regarding these chips and
hence must act to ensure users' safety.

This patch splits the chip definitions of evil twins into separate ones which
correctly declare the respective attributes (the main problems are the erase
block sizes for the 0x20 opcode and hence my changes combine different
chips with partly different attributes apart from their names as long as the
erasers layout it the same). This forces the user to select the (right) chip
definition with the -c/--chip parameter and hence will break a number of
previously perfectly working environments.

0x2015 is used by and split to
 - MX25L1605 (64kB sectors in 0x20 erases)
 - MX25L1605A/MX25L1606E (4kB in 0x20 erases and an additional 0x52 opcode with 64kB blocks)
 - MX25L1605D/MX25L1608D (4k sectors in 0x20 erases)

0x2016 is used by and split to
 - MX25L3205/MX25L3205A (64kB 0x20)
 - MX25L3205D/MX25L3208D (4kB 0x20)
 - MX25L3206E (4k 0x20, 64k 0x52)

0x2017 is used by and split to
 - MX25L6405/MX25L6405D (64k 0x20)
 - MX25L6406E/MX25L6436E (4k 0x20)
 - MX25L6445E (4k 0x20, 64k 0x52)

Bonus: add some minor details to MX25L1635D, MX25L1635E, MX25L3235D,
MX25L12805D.

Tested with MX25L3206E, MX25L64036E.

Corresponding to flashrom svn r1657.
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      226037da
  5. 15 Mar, 2013 1 commit
  7. 04 Mar, 2013 1 commit
  9. 22 Feb, 2013 1 commit
  11. 02 Feb, 2013 1 commit
  13. 01 Jan, 2013 1 commit
  15. 29 Dec, 2012 3 commits
    • Stefan Tauner's avatar
      Add support for Atmel's AT25F series of SPI flash chips · 57794ac1
      Stefan Tauner authored 
      
This adds support for the following chips:
 - AT25F512, AT25F512A, AT25F512B
 - AT25F1024, AT25F1024A
 - AT25F2048
 - AT25F4096

Besides the definitions of the the chips in flashchips.c this includes
- a dedicated probing method (probe_spi_at25f)
- pretty printing methods (spi_prettyprint_status_register_at25f*), and
- unlocking methods (spi_disable_blockprotect_at25f*)

Corresponding to flashrom svn r1637.
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      57794ac1
    • Stefan Tauner's avatar
      Add support for Intel S33 series flash chips · 54aaa4ae
      Stefan Tauner authored 
      
This includes:
Bottom boot block:
* 16Mb/2MB:
  QB25F160S33B8, QB25F016S33B8, QH25F160S33B8, QH25F016S33B8
* 32Mb/4MB:
  QB25F320S33B8, QH25F320S33B8
* 64Mb/8MB:
  QB25F640S33B8, QH25F640S33B8

Top boot block:
* 16Mb/2MB:
  QB25F160S33T8, QB25F016S33T8, QH25F160S33T8, QH25F016S33T8
* 32Mb/4MB:
  QB25F320S33T8, QH25F320S33T8
* 64Mb/8MB:
  QB25F640S33T8, QH25F640S33T8

At least some seem to be marketed by other vendors (too?) but also with
Intel's vendor ID.

Besides a 0xC7 chip erase and a 0xD8 uniform 64kB block erase they
support also erasing the top/bottom 8 8kB blocks with opcode 0x40.
But since this command fails for all addresses outside those ranges,
it is not easily implemented with flashrom's current code base and
hence left out.

Corresponding to flashrom svn r1636.
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      54aaa4ae
    • Stefan Tauner's avatar
      Improve SPI status register pretty printing · 6ee37e28
      Stefan Tauner authored 
      
 - Move all functions related to SPI status registers to a new file
   spi25_statusreg.c. This includes the generic as well as the
   SST-specific functions from spi25.c and the chip-specific functions
   from a25.c and at25.c.
 - introduce helper functions
    * spi_prettyprint_status_register_hex()
    * spi_prettyprint_status_register_bpl()
    * spi_prettyprint_status_register_plain()
   Use the latter on every compatible flash chip that has no better printlock
   function set and get rid of the implicit pretty printing in the SPI probing
   functions.
 - remove
    * spi_prettyprint_status_register_common()
    * spi_prettyprint_status_register_amic_a25lq032() because it can be fully
      substituted with spi_prettyprint_status_register_amic_a25l032().
    * spi_prettyprint_status_register() (old switch, no longer needed)
 - promote and export
    * spi_prettyprint_status_register_amic_a25l05p() as spi_prettyprint_status_register_default_bp1().
    * spi_prettyprint_status_register_amic_a25l40p() as spi_prettyprint_status_register_default_bp2().
    * spi_prettyprint_status_register_st_m25p() as spi_prettyprint_status_register_default_bp3().
 - add #define TEST_BAD_REW and use it for a number of Atmel chips which
   had only TEST_BAD_READ set even though they dont have erasers or a write
   function set.

Corresponding to flashrom svn r1634.
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      6ee37e28
  17. 28 Oct, 2012 1 commit
  19. 27 Oct, 2012 1 commit
    • Stefan Tauner's avatar
      Add support for Atmel AT26DF041 · 94b39b47
      Stefan Tauner authored 
      
Wicked chip: No WRSR, no write enable command (but swallows our
default one without a problem), supports an auto-erasing page write
(but even without that page writes are recommended to write the
whole page i.e. operate on a completely erased page), mad
requirements on block refreshments if only partly written.

Found on my Intel D946GZIS and tested with my serprog in situ.
Using the page write by setting JEDEC_BYTE_PROGRAM to 0x11 and using
the spi_chip_write_256 command greatly improves performance and works
flawlessly.

Corresponding to flashrom svn r1616.
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      94b39b47
  21. 26 Oct, 2012 1 commit
  23. 20 Oct, 2012 1 commit
  25. 04 Oct, 2012 1 commit
  27. 01 Oct, 2012 1 commit
  29. 21 Sep, 2012 2 commits
  31. 17 Sep, 2012 1 commit
  33. 06 Sep, 2012 1 commit
  35. 27 Aug, 2012 1 commit
  37. 26 Aug, 2012 1 commit
  39. 13 Aug, 2012 1 commit
  41. 28 Jul, 2012 1 commit
  43. 20 May, 2012 1 commit
  45. 14 May, 2012 1 commit
  47. 02 May, 2012 1 commit
    • Steven Zakulec's avatar
      Tag all EWSR chips correctly · 3603a28a
      Steven Zakulec authored 
      
All SPI chips without a WRSR feature bit set were evaluated except the
Sanyo LF25FW203A for which no datasheet is available.

The following list includes all SPI-capable chips that still have no
WRSR feature bit set:
 - AT26DF041
 - AT45CS1282
 - AT45DB011D
 - AT45DB021D
 - AT45DB041D
 - AT45DB081D
 - AT45DB161D
 - AT45DB321C
 - AT45DB321D
 - AT45DB642D

All of them have no write function set and can be therefore ignored
for now.

Apart from those the generic chips are also not tagged. The opaque
flash interface should not be affected. The SFDP dummy chip is
changed to explicitly set EWSR if it can't deduce it dynamically.
The vendor detecting generic chips can't write anyway.

Corresponding to flashrom svn r1527.
Signed-off-by: default avatarSteven Zakulec <spzakulec@gmail.com>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      3603a28a
  49. 27 Apr, 2012 1 commit
  51. 15 Apr, 2012 1 commit
  53. 14 Apr, 2012 3 commits
  55. 17 Feb, 2012 1 commit
  57. 16 Feb, 2012 1 commit
  59. 15 Feb, 2012 1 commit
  61. 02 Dec, 2011 1 commit
  63. 04 Nov, 2011 1 commit
  65. 21 Oct, 2011 1 commit
  67. 13 Sep, 2011 1 commit

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