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Commit ac427b22 authored by Paul Menzel's avatar Paul Menzel Committed by Stefan Tauner
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Add a bunch of new/tested stuff and various small changes 10 

Tested mainboards:
OK:
 - ABIT A-S78H
   http://www.flashrom.org/pipermail/flashrom/2012-January/008603.html
 - ASRock AM2NF6G-VSTA
   http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html
 - ASUS KFSN4-DRE/SAS
   reported by ted on IRC
 - ASUS M2A-VM (HDMI variant)
   http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html
 - ASUS M4N78 PRO
   http://www.flashrom.org/pipermail/flashrom/2012-January/008598.html
 - ASUS P5K-V
   http://www.flashrom.org/pipermail/flashrom/2012-February/008737.html
 - ASUS P5KPL-CM
   http://www.flashrom.org/pipermail/flashrom/2012-January/008522.html
 - ASUS P5N7A-VM
   http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html
 - ASUS P5QPL-AM
   http://www.flashrom.org/pipermail/flashrom/2012-January/008557.html
 - ECS GF7100PVT-M3
   http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html
 - ECS K7SEM
   http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html
 - ECS P4M800PRO-M V2.0
   http://www.flashrom.org/pipermail/flashrom/2012-January/008478.html
 - Gigabyte 880GMA-USB3
   http://www.flashrom.org/pipermail/flashrom/2012-February/008715.html
 - Gigabyte GA-EP31-DS3L
   http://www.flashrom.org/pipermail/flashrom/2012-January/008601.html
 - Gigabyte GA-X58A-UDR3
   http://www.flashrom.org/pipermail/flashrom/2012-January/008572.html
 - Gigabyte GA-Z68XP-UD3
   http://paste.flashrom.org/view.php?id=1058
 - HP ProLiant N40L
   http://www.flashrom.org/pipermail/flashrom/2012-February/008650.html
 - MSI MS-7309 (K9N6PGM2-V2)
   http://www.flashrom.org/pipermail/flashrom/2011-December/008441.html
 - MSI MS-7548 (Aspen-GL8E used in HP Pavilion a6750f)
   http://www.flashrom.org/pipermail/flashrom/2012-February/008666.html
 - MSI MS-7676 (H67MA-ED55(B3))
   http://www.flashrom.org/pipermail/flashrom/2012-January/008547.html
 - PC Engines Alix.6f2
   Reported by Philip Prindeville on IRC
 - Shuttle AV18E2
   http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html
 - Supermicro X8DTE-F
   http://www.flashrom.org/pipermail/flashrom/2011-November/008304.html
 - Supermicro X8DTT-HIBQF
   http://www.flashrom.org/pipermail/flashrom/2012-January/008520.html
NOT OK:
 - ASUS P8H61-M LE/USB3
   http://www.flashrom.org/pipermail/flashrom/2012-January/008491.html
 - ASUS P8H67-M PRO
   http://www.flashrom.org/pipermail/flashrom/2011-December/008321.html
 - ASUS P8Z68-V PRO
   http://www.flashrom.org/pipermail/flashrom/2012-January/008469.html
 - Clevo P150HM (laptop)
   http://www.flashrom.org/pipermail/flashrom/2012-February/008717.html
 - Intel D425KT
   http://www.flashrom.org/pipermail/flashrom/2012-January/008600.html
 - Supermicro X9SCA-F
   http://www.flashrom.org/pipermail/flashrom/2011-December/008313.html

Tested flash chips:
 - mark AT29C512 as TEST_OK_PREW
   http://paste.flashrom.org/view.php?id=977
 - mark M25P40 as TEST_OK_PREW
   http://www.flashrom.org/pipermail/flashrom/2011-December/008351.html
 - mark M25PE80 as TEST_OK_PREW
   http://paste.flashrom.org/view.php?id=1061
 - mark MX25L6405 as TEST_OK_PREW
   tested myself with an MX25L6436E variant on serprog
 - mark W39V080A as TEST_OK_PREW
   http://www.flashrom.org/pipermail/flashrom/2012-January/008509.html

Tested chipsets:
 - SiS 730 (:0730)
   http://www.flashrom.org/pipermail/flashrom/2011-December/008362.html
 - NVIDIA MCP61 (:03e0)
   http://www.flashrom.org/pipermail/flashrom/2012-January/008534.html
 - NVIDIA MCP73 (:07d7)
   http://www.flashrom.org/pipermail/flashrom/2011-December/008412.html
 - NVIDIA MCP79 (:0aac)
   http://www.flashrom.org/pipermail/flashrom/2012-January/008508.html
 - VIA VT82C69x (0691) and VT82C686A/B (:0686)
   http://www.flashrom.org/pipermail/flashrom/2011-December/008459.html



 - AMD's SB950 (and presumably also SB920) have the same PCI ID as previous
   generations, hence change the chipset enable device string. Thanks to
   Christian Ruppert for the suggestion.
 - Fix the board enable of the abit NF-M2 nView which had the IDs of its onboard
   graphics card in its pattern. Change this to the LPC controller.
 - Intel X79 SPI registers are identical to 6 Series', so use the chipsetenable
   wrapper of it (enable_flash_pch6).
 - Fix two paranoid checks for address < 0 in ichspi.c which became futile (and
   generate clang warnings) with the unsignify patch committed in r1470.
 - Rename AT25DF641 to AT25DF641(A). They are almost idencical, but could
   be distinguished by an extended RDID probe (Atmel's patented EDI procedure),
   which we do not support yet, hence handle them as one model for now.
 - Source format fixes and typos

Corresponding to flashrom svn r1499.

the addition of the ASRock AM2NF6G-VSTA to print.c is
Signed-off-by: default avatarPaul Menzel <paulepanter@users.sourceforge.net>
everything else is
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
parent 8541d231
Expand all Hide whitespace changes
Inline Side-by-side
Showing with 57 additions and 29 deletions
board_enable.c
View file @ ac427b22
......@@ -1562,7 +1562,7 @@ static int intel_ich_gpio34_raise(void)
/*
* Suited for:
* - AOpen i945GMx-VFX: Intel 945GM + ICH7-M used in ...
* - FCS ESPRIMO Q5010 (SMBIOS: D2544-B1)
* - FSC ESPRIMO Q5010 (SMBIOS: D2544-B1)
*/
static int intel_ich_gpio38_raise(void)
{
......@@ -2114,7 +2114,7 @@ const struct board_match board_matches[] = {
{0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, P3, "abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise},
{0x10de, 0x0050, 0x147b, 0x1c1a, 0, 0, 0, 0, NULL, NULL, NULL, P3, "abit", "KN8 Ultra", 0, NT, nvidia_mcp_gpio2_lower},
{0x10de, 0x01e0, 0x147b, 0x1c00, 0x10de, 0x0060, 0x147B, 0x1c00, NULL, NULL, NULL, P3, "abit", "NF7-S", 0, OK, nvidia_mcp_gpio8_raise},
{0x10de, 0x02f0, 0x147b, 0x1c26, 0x10de, 0x0240, 0x10de, 0x0222, NULL, NULL, NULL, P3, "abit", "NF-M2 nView", 0, OK, nvidia_mcp_gpio4_lower},
{0x10de, 0x02f0, 0x147b, 0x1c26, 0x10de, 0x0260, 0x147b, 0x1c26, NULL, NULL, NULL, P3, "abit", "NF-M2 nView", 0, OK, nvidia_mcp_gpio4_lower},
{0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, "(VA6)$", NULL, NULL, P3, "abit", "VA6", 0, OK, via_apollo_gpo4_lower},
{0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", P3, "abit", "VT6X4", 0, OK, via_apollo_gpo4_lower},
{0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, P3, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd},
......
chipset_enable.c
View file @ ac427b22
......@@ -1155,7 +1155,7 @@ const struct penable chipset_enables[] = {
#if defined(__i386__) || defined(__x86_64__)
{0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400},
{0x1002, 0x438d, OK, "AMD", "SB600", enable_flash_sb600},
{0x1002, 0x439d, OK, "AMD", "SB700/SB710/SB750/SB850", enable_flash_sb600},
{0x1002, 0x439d, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_sb600},
{0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100},
{0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536},
{0x1022, 0x2090, OK, "AMD", "CS5536", enable_flash_cs5536},
......@@ -1178,7 +1178,7 @@ const struct penable chipset_enables[] = {
{0x1039, 0x0651, OK, "SiS", "651", enable_flash_sis540},
{0x1039, 0x0655, NT, "SiS", "655", enable_flash_sis540},
{0x1039, 0x0661, OK, "SiS", "661", enable_flash_sis540},
{0x1039, 0x0730, NT, "SiS", "730", enable_flash_sis540},
{0x1039, 0x0730, OK, "SiS", "730", enable_flash_sis540},
{0x1039, 0x0733, NT, "SiS", "733", enable_flash_sis540},
{0x1039, 0x0735, OK, "SiS", "735", enable_flash_sis540},
{0x1039, 0x0740, NT, "SiS", "740", enable_flash_sis540},
......@@ -1222,7 +1222,7 @@ const struct penable chipset_enables[] = {
{0x10de, 0x0365, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */
{0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */
{0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */
{0x10de, 0x03e0, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x},
{0x10de, 0x03e0, OK, "NVIDIA", "MCP61", enable_flash_mcp6x_7x},
{0x10de, 0x03e1, OK, "NVIDIA", "MCP61", enable_flash_mcp6x_7x},
{0x10de, 0x03e2, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x},
{0x10de, 0x03e3, NT, "NVIDIA", "MCP61", enable_flash_mcp6x_7x},
......@@ -1233,8 +1233,8 @@ const struct penable chipset_enables[] = {
{0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp6x_7x},
{0x10de, 0x075c, NT, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x},
{0x10de, 0x075d, OK, "NVIDIA", "MCP78S", enable_flash_mcp6x_7x},
{0x10de, 0x07d7, NT, "NVIDIA", "MCP73", enable_flash_mcp6x_7x},
{0x10de, 0x0aac, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x},
{0x10de, 0x07d7, OK, "NVIDIA", "MCP73", enable_flash_mcp6x_7x},
{0x10de, 0x0aac, OK, "NVIDIA", "MCP79", enable_flash_mcp6x_7x},
{0x10de, 0x0aad, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x},
{0x10de, 0x0aae, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x},
{0x10de, 0x0aaf, NT, "NVIDIA", "MCP79", enable_flash_mcp6x_7x},
......@@ -1243,12 +1243,12 @@ const struct penable chipset_enables[] = {
{0x1106, 0x0595, NT, "VIA", "VT82C595", via_no_byte_merge},
{0x1106, 0x0597, NT, "VIA", "VT82C597", via_no_byte_merge},
{0x1106, 0x0601, NT, "VIA", "VT8601/VT8601A", via_no_byte_merge},
{0x1106, 0x0691, NT, "VIA", "VT82C69x", via_no_byte_merge}, /* 691, 693a, 694t, 694x checked */
{0x1106, 0x0691, OK, "VIA", "VT82C69x", via_no_byte_merge},
{0x1106, 0x8601, NT, "VIA", "VT8601T", via_no_byte_merge},
/* VIA southbridges */
{0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111},
{0x1106, 0x0596, OK, "VIA", "VT82C596", enable_flash_amd8111},
{0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111},
{0x1106, 0x0686, OK, "VIA", "VT82C686A/B", enable_flash_amd8111},
{0x1106, 0x3074, OK, "VIA", "VT8233", enable_flash_vt823x},
{0x1106, 0x3147, OK, "VIA", "VT8233A", enable_flash_vt823x},
{0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x},
......@@ -1279,8 +1279,8 @@ const struct penable chipset_enables[] = {
{0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_pch6},
{0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_pch6},
{0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_pch6},
{0x8086, 0x1d40, OK, "Intel", "X79", enable_flash_ich10}, /* FIXME: when datasheet is available */
{0x8086, 0x1d41, NT, "Intel", "X79", enable_flash_ich10}, /* FIXME: when datasheet is available */
{0x8086, 0x1d40, OK, "Intel", "X79", enable_flash_pch6},
{0x8086, 0x1d41, NT, "Intel", "X79", enable_flash_pch6},
{0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e},
{0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e},
{0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e},
......
dediprog.c
View file @ ac427b22
......@@ -299,7 +299,7 @@ static int dediprog_spi_read(struct flashctx *flash, uint8_t *buf,
return 0;
}
/* Bulk write interface, will read multiple page_size byte chunks aligned to page_size bytes.
/* Bulk write interface, will write multiple page_size byte chunks aligned to page_size bytes.
* @start start address
* @len length
* @return 0 on success, 1 on failure
......
dummyflasher.c
View file @ ac427b22
......@@ -435,7 +435,7 @@ static int emulate_spi_chip_response(unsigned int writecnt,
msg_perr("No command sent to the chip!\n");
return 1;
}
/* spi_blacklist has precedence before spi_ignorelist. */
/* spi_blacklist has precedence over spi_ignorelist. */
for (i = 0; i < spi_blacklist_size; i++) {
if (writearr[0] == spi_blacklist[i]) {
msg_pdbg("Refusing blacklisted SPI command 0x%02x\n",
......
flashchips.c
View file @ ac427b22
......@@ -1579,7 +1579,7 @@ const struct flashchip flashchips[] = {
{
.vendor = "Atmel",
.name = "AT25DF641",
.name = "AT25DF641(A)",
.bustype = BUS_SPI,
.manufacture_id = ATMEL_ID,
.model_id = ATMEL_AT25DF641,
......@@ -1967,7 +1967,7 @@ const struct flashchip flashchips[] = {
.total_size = 64,
.page_size = 128,
.feature_bits = FEATURE_LONG_RESET,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_jedec,
.probe_timing = 10000, /* 10mS, Enter=Exec */
.block_erasers =
......@@ -4427,7 +4427,7 @@ const struct flashchip flashchips[] = {
.total_size = 8192,
.page_size = 256,
.feature_bits = FEATURE_WRSR_WREN,
.tested = TEST_OK_PROBE,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -4957,7 +4957,7 @@ const struct flashchip flashchips[] = {
.model_id = ST_M25PE80,
.total_size = 1024,
.page_size = 256,
.tested = TEST_OK_PRE,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -6910,7 +6910,7 @@ const struct flashchip flashchips[] = {
.model_id = ST_M25P40,
.total_size = 512,
.page_size = 256,
.tested = TEST_OK_PR,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
.block_erasers =
......@@ -8690,9 +8690,9 @@ const struct flashchip flashchips[] = {
.total_size = 1024,
.page_size = 64 * 1024,
.feature_bits = FEATURE_EITHER_RESET,
.tested = TEST_UNTESTED,
.tested = TEST_OK_PREW,
.probe = probe_jedec,
.probe_timing = 10,
.probe_timing = 10,
.block_erasers =
{
{
......
flashchips.h
View file @ ac427b22
......@@ -364,7 +364,7 @@
#define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005 */
#define MACRONIX_MX25L1605 0x2015 /* MX25L1605{,A,D} */
#define MACRONIX_MX25L3205 0x2016 /* MX25L3205{,A} */
#define MACRONIX_MX25L6405 0x2017 /* MX25L3205{,D} */
#define MACRONIX_MX25L6405 0x2017 /* MX25L6405{,D}, MX25L6406E, MX25L6436E */
#define MACRONIX_MX25L12805 0x2018 /* MX25L12805 */
#define MACRONIX_MX25L1635D 0x2415
#define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */
......
ichspi.c
View file @ ac427b22
......@@ -1286,7 +1286,7 @@ static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf,
uint16_t timeout = 100 * 60;
uint8_t block_len;
if (addr < 0 || addr + len > flash->total_size * 1024) {
if (addr + len > flash->total_size * 1024) {
msg_perr("Request to read from an inaccessible memory address "
"(addr=0x%x, len=%d).\n", addr, len);
return -1;
......@@ -1324,7 +1324,7 @@ static int ich_hwseq_write(struct flashctx *flash, uint8_t *buf,
uint16_t timeout = 100 * 60;
uint8_t block_len;
if (addr < 0 || addr + len > flash->total_size * 1024) {
if (addr + len > flash->total_size * 1024) {
msg_perr("Request to write to an inaccessible memory address "
"(addr=0x%x, len=%d).\n", addr, len);
return -1;
......
print.c
View file @ ac427b22
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