Some ISO C fixes

This patch just fixes a limited number of bits not conforming to c99 by using
 - __asm__ instead of just asm
 - {0} instead of {} for struct initialization
 - h_addr_list[0] instead of h_addr to access the host address in
   struct hostent
 - #include <strings.h> where needed (for ffs and strcasecmp)

Based on a previous patch by Carl-Daniel.

Corresponding to flashrom svn r1585.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

atahpt.c

@@ -38,7 +38,7 @@ const struct pcidev_status ata_hpt[] = {
 	{0x1103, 0x0005, NT, "Highpoint", "HPT372A/372N"},
 	{0x1103, 0x0006, NT, "Highpoint", "HPT302/302N"},
 
-	{},
+	{0},
 };
 
 static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,

board_enable.c

@@ -24,6 +24,7 @@
  * Contains the board specific flash enables.
  */
 
+#include <strings.h>
 #include <string.h>
 #include <stdlib.h>
 #include "flash.h"
@@ -292,7 +293,7 @@ static uint8_t w836xx_deviceid_hwmon(uint16_t sio_port)
 
 void probe_superio_winbond(void)
 {
-	struct superio s = {};
+	struct superio s = {0};
 	uint16_t winbond_ports[] = {WINBOND_SUPERIO_PORT1, WINBOND_SUPERIO_PORT2, 0};
 	uint16_t *i = winbond_ports;
 	uint8_t model;

buspirate_spi.c

@@ -18,6 +18,7 @@
  */
 
 #include <stdio.h>
+#include <strings.h>
 #include <string.h>
 #include <stdlib.h>
 #include <ctype.h>

cbtable.c

@@ -25,6 +25,7 @@
 #include <unistd.h>
 #include <stdio.h>
 #include <ctype.h>
+#include <strings.h>
 #include <string.h>
 #include "flash.h"
 #include "programmer.h"

chipset_enable.c

@@ -1466,7 +1466,7 @@ const struct penable chipset_enables[] = {
 	{0x8086, 0x8c5e, NT, "Intel", "Lynx Point",	enable_flash_pch8},
 	{0x8086, 0x8c5f, NT, "Intel", "Lynx Point",	enable_flash_pch8},
 #endif
-	{},
+	{0},
 };
 
 int chipset_flash_enable(void)

dmi.c

@@ -18,6 +18,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
+#include <strings.h>
 #include <string.h>
 #include <stdio.h>
 #include <stdlib.h>

drkaiser.c

@@ -35,7 +35,8 @@
 
 const struct pcidev_status drkaiser_pcidev[] = {
 	{0x1803, 0x5057, OK, "Dr. Kaiser", "PC-Waechter (Actel FPGA)"},
-	{},
+
+	{0},
 };
 
 static uint8_t *drkaiser_bar;
@@ -61,7 +62,7 @@ static int drkaiser_shutdown(void *data)
 	/* Flash write is disabled automatically by PCI restore. */
 	pci_cleanup(pacc);
 	return 0;
-};
+}
 
 int drkaiser_init(void)
 {

flashchips.c

@@ -9496,7 +9496,7 @@ const struct flashchip flashchips[] = {
 		.unlock		= spi_disable_blockprotect, /* is this safe? */
 		.read		= spi_chip_read,
 		/* FIXME: some vendor extensions define this */
-		.voltage	= {},
+		.voltage	= {0},
 		 /* Everything below will be set by the probing function. */
 		.write		= NULL,
 		.total_size	= 0,

flashrom.c

@@ -263,7 +263,7 @@ const struct programmer_entry programmer_table[] = {
 	},
 #endif
 
-	{}, /* This entry corresponds to PROGRAMMER_INVALID. */
+	{0}, /* This entry corresponds to PROGRAMMER_INVALID. */
 };
 
 #define SHUTDOWN_MAXFN 32

ft2232_spi.c

@@ -21,6 +21,7 @@
 #if CONFIG_FT2232_SPI == 1
 
 #include <stdio.h>
+#include <strings.h>
 #include <string.h>
 #include <stdlib.h>
 #include <ctype.h>
@@ -61,7 +62,8 @@ const struct usbdev_status devs_ft2232spi[] = {
 	{OLIMEX_VID, OLIMEX_ARM_TINY_PID, OK, "Olimex", "ARM-USB-TINY"},
 	{OLIMEX_VID, OLIMEX_ARM_OCD_H_PID, NT, "Olimex", "ARM-USB-OCD-H"},
 	{OLIMEX_VID, OLIMEX_ARM_TINY_H_PID, NT, "Olimex", "ARM-USB-TINY-H"},
-	{},
+
+	{0},
 };
 
 

gfxnvidia.c

@@ -59,7 +59,7 @@ const struct pcidev_status gfx_nvidia[] = {
 	{0x10de, 0x0202, NT, "NVIDIA", "GeForce 3 nFX Ultra" },
 	{0x10de, 0x0203, NT, "NVIDIA", "Quadro 3 DDC" },
 
-	{},
+	{0},
 };
 
 static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val,

hwaccess.c

@@ -97,7 +97,7 @@ static inline void sync_primitive(void)
 	 * Such reordering and/or merging would break device accesses which
 	 * depend on the exact access order.
 	 */
-	asm("eieio" : : : "memory");
+	___asm___ volatile ("eieio" : : : "memory");
 }
 
 /* PCI port I/O is not yet implemented on PowerPC. */

hwaccess.h

@@ -174,7 +174,6 @@ cpu_to_be(64)
 
 /* for iopl and outb under Solaris */
 #if defined (__sun) && (defined(__i386) || defined(__amd64))
-#include <strings.h>
 #include <sys/sysi86.h>
 #include <sys/psw.h>
 #include <asm/sunddi.h>
@@ -263,37 +262,37 @@ cpu_to_be(64)
 
 static inline void outb(uint8_t value, uint16_t port)
 {
-	asm volatile ("outb %b0,%w1": :"a" (value), "Nd" (port));
+	__asm__ volatile ("outb %b0,%w1": :"a" (value), "Nd" (port));
 }
 
 static inline uint8_t inb(uint16_t port)
 {
 	uint8_t value;
-	asm volatile ("inb %w1,%0":"=a" (value):"Nd" (port));
+	__asm__ volatile ("inb %w1,%0":"=a" (value):"Nd" (port));
 	return value;
 }
 
 static inline void outw(uint16_t value, uint16_t port)
 {
-	asm volatile ("outw %w0,%w1": :"a" (value), "Nd" (port));
+	__asm__ volatile ("outw %w0,%w1": :"a" (value), "Nd" (port));
 }
 
 static inline uint16_t inw(uint16_t port)
 {
 	uint16_t value;
-	asm volatile ("inw %w1,%0":"=a" (value):"Nd" (port));
+	__asm__ volatile ("inw %w1,%0":"=a" (value):"Nd" (port));
 	return value;
 }
 
 static inline void outl(uint32_t value, uint16_t port)
 {
-	asm volatile ("outl %0,%w1": :"a" (value), "Nd" (port));
+	__asm__ volatile ("outl %0,%w1": :"a" (value), "Nd" (port));
 }
 
 static inline uint32_t inl(uint16_t port)
 {
 	uint32_t value;
-	asm volatile ("inl %1,%0":"=a" (value):"Nd" (port));
+	__asm__ volatile ("inl %1,%0":"=a" (value):"Nd" (port));
 	return value;
 }
   #endif

internal.c

@@ -18,6 +18,7 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
+#include <strings.h>
 #include <string.h>
 #include <stdlib.h>
 #include "flash.h"

it87spi.c

@@ -74,7 +74,7 @@ uint16_t probe_id_ite(uint16_t port)
 
 void probe_superio_ite(void)
 {
-	struct superio s = {};
+	struct superio s = {0};
 	uint16_t ite_ports[] = {ITE_SUPERIO_PORT1, ITE_SUPERIO_PORT2, 0};
 	uint16_t *i = ite_ports;
 

nic3com.c

@@ -53,7 +53,7 @@ const struct pcidev_status nics_3com[] = {
 	/* 3C980C */
 	{0x10b7, 0x9805, NT, "3COM", "3C980C: EtherLink Server 10/100 PCI (TX)" },
 
-	{},
+	{0},
 };
 
 static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val,

nicintel.c

@@ -31,7 +31,7 @@ const struct pcidev_status nics_intel[] = {
 	{PCI_VENDOR_ID_INTEL, 0x1209, NT, "Intel", "8255xER/82551IT Fast Ethernet Controller"},
 	{PCI_VENDOR_ID_INTEL, 0x1229, OK, "Intel", "82557/8/9/0/1 Ethernet Pro 100"},
 
-	{},
+	{0},
 };
 
 /* Arbitrary limit, taken from the datasheet I just had lying around.

nicintel_spi.c

@@ -73,7 +73,7 @@ const struct pcidev_status nics_intel_spi[] = {
 	{PCI_VENDOR_ID_INTEL, 0x107c, OK, "Intel", "82541PI Gigabit Ethernet Controller"},
 	{PCI_VENDOR_ID_INTEL, 0x10b9, OK, "Intel", "82572EI Gigabit Ethernet Controller"},
 
-	{},
+	{0},
 };
 
 static void nicintel_request_spibus(void)

nicnatsemi.c

@@ -33,7 +33,8 @@
 const struct pcidev_status nics_natsemi[] = {
 	{0x100b, 0x0020, NT, "National Semiconductor", "DP83815/DP83816"},
 	{0x100b, 0x0022, NT, "National Semiconductor", "DP83820"},
-	{},
+
+	{0},
 };
 
 static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val,

nicrealtek.c

@@ -34,7 +34,8 @@
 const struct pcidev_status nics_realtek[] = {
 	{0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"},
 	{0x1113, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */
-	{},
+
+	{0},
 };
 
 static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val,