- 25 Jun, 2018 2 commits
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Sebastien Bourdeauducq authored
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Sebastien Bourdeauducq authored
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- 23 Jun, 2018 1 commit
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whitequark authored
Fixes #114.
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- 22 Jun, 2018 11 commits
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Caleb Jamison authored
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Caleb Jamison authored
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Caleb Jamison authored
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Caleb Jamison authored
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Caleb Jamison authored
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Caleb Jamison authored
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Caleb Jamison authored
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Caleb Jamison authored
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Caleb Jamison authored
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Caleb Jamison authored
The litex config doesn't have the eth_ref_clk that's found in the diligent xdc file. Removed _35t from filename, as there is no difference between the 35 and 100 in pins of the xdc files. Need input for chipkit io and analog, and on power measurements.
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Caleb Jamison authored
Derived from Digilent's XDC and Schematic files, and from William D. Jones' Arty S7 file in this repo.
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- 19 Jun, 2018 1 commit
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Mikołaj Sowiński authored
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- 15 Jun, 2018 2 commits
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Robert Jördens authored
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Robert Jördens authored
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- 13 Jun, 2018 3 commits
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Sebastien Bourdeauducq authored
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Sebastien Bourdeauducq authored
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Sebastien Bourdeauducq authored
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- 12 Jun, 2018 1 commit
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Robert Jördens authored
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- 10 Jun, 2018 1 commit
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Robert Jördens authored
verilog 2001 4.5.1
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- 06 Jun, 2018 1 commit
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Florent Kermarrec authored
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- 05 Jun, 2018 1 commit
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Florent Kermarrec authored
revert genlib/cdc: add optional master parameter to ElasticBuffer to allow sharing write reset between ElasticBuffers
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- 04 Jun, 2018 1 commit
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Florent Kermarrec authored
genlib/cdc: add optional master parameter to ElasticBuffer to allow sharing write reset between ElasticBuffers
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- 30 May, 2018 1 commit
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whitequark authored
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- 28 May, 2018 1 commit
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whitequark authored
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- 25 May, 2018 1 commit
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whitequark authored
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- 17 May, 2018 2 commits
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William D. Jones authored
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William D. Jones authored
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- 15 May, 2018 1 commit
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Florent Kermarrec authored
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- 02 May, 2018 2 commits
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whitequark authored
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whitequark authored
This causes warnings when synthesizing with Yosys.
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- 29 Apr, 2018 3 commits
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whitequark authored
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whitequark authored
arachne-pnr makes surprising and bad choices when promoting globals.
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whitequark authored
This is useful to avoid glitches at startup e.g. when synchronizing I2C SDA/SCL lines.
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- 27 Apr, 2018 3 commits
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Robert Jordens authored
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Robert Jordens authored
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Robert Jordens authored
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- 25 Apr, 2018 1 commit
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Robert Jordens authored
Apparently nobody has been using it so far. Port directions were wrong. Made it SAME_EDGE to mirror ODDR
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