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Kestrel Collaboration
Kestrel LiteX
migen
Commits
cba5bea5
Commit
cba5bea5
authored
6 years ago
by
Florent Kermarrec
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Plain Diff
sayma_amc/rtm: use DIFF_TERM=TRUE on serwb lvds inputs
parent
9bc084a6
Changes
2
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2 changed files
with
6 additions
and
6 deletions
+6
-6
migen/build/platforms/sinara/sayma_amc.py
migen/build/platforms/sinara/sayma_amc.py
+2
-2
migen/build/platforms/sinara/sayma_rtm.py
migen/build/platforms/sinara/sayma_rtm.py
+4
-4
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migen/build/platforms/sinara/sayma_amc.py
View file @
cba5bea5
...
@@ -161,8 +161,8 @@ _io = [
...
@@ -161,8 +161,8 @@ _io = [
Subsignal
(
"clk_n"
,
Pins
(
"H8"
)),
# rtm_fpga_usr_io_n
Subsignal
(
"clk_n"
,
Pins
(
"H8"
)),
# rtm_fpga_usr_io_n
Subsignal
(
"tx_p"
,
Pins
(
"A13"
)),
# rtm_fpga_lvds1_p
Subsignal
(
"tx_p"
,
Pins
(
"A13"
)),
# rtm_fpga_lvds1_p
Subsignal
(
"tx_n"
,
Pins
(
"A12"
)),
# rtm_fpga_lvds1_n
Subsignal
(
"tx_n"
,
Pins
(
"A12"
)),
# rtm_fpga_lvds1_n
Subsignal
(
"rx_p"
,
Pins
(
"C12"
)),
# rtm_fpga_lvds2_p
Subsignal
(
"rx_p"
,
Pins
(
"C12"
)
,
Misc
(
"DIFF_TERM=TRUE"
)
),
# rtm_fpga_lvds2_p
Subsignal
(
"rx_n"
,
Pins
(
"B12"
)),
# rtm_fpga_lvds2_n
Subsignal
(
"rx_n"
,
Pins
(
"B12"
)
,
Misc
(
"DIFF_TERM=TRUE"
)
),
# rtm_fpga_lvds2_n
IOStandard
(
"LVDS"
)
IOStandard
(
"LVDS"
)
),
),
...
...
This diff is collapsed.
Click to expand it.
migen/build/platforms/sinara/sayma_rtm.py
View file @
cba5bea5
...
@@ -12,12 +12,12 @@ _io = [
...
@@ -12,12 +12,12 @@ _io = [
),
),
(
"amc_rtm_serwb"
,
0
,
(
"amc_rtm_serwb"
,
0
,
Subsignal
(
"clk_p"
,
Pins
(
"R18"
)),
# rtm_fpga_usr_io_p
Subsignal
(
"clk_p"
,
Pins
(
"R18"
)
,
Misc
(
"DIFF_TERM=TRUE"
)
),
# rtm_fpga_usr_io_p
Subsignal
(
"clk_n"
,
Pins
(
"T18"
)),
# rtm_fpga_usr_io_n
Subsignal
(
"clk_n"
,
Pins
(
"T18"
)
,
Misc
(
"DIFF_TERM=TRUE"
)
),
# rtm_fpga_usr_io_n
Subsignal
(
"tx_p"
,
Pins
(
"T17"
)),
# rtm_fpga_lvds2_p
Subsignal
(
"tx_p"
,
Pins
(
"T17"
)),
# rtm_fpga_lvds2_p
Subsignal
(
"tx_n"
,
Pins
(
"U17"
)),
# rtm_fpga_lvds2_n
Subsignal
(
"tx_n"
,
Pins
(
"U17"
)),
# rtm_fpga_lvds2_n
Subsignal
(
"rx_p"
,
Pins
(
"R16"
)),
# rtm_fpga_lvds1_p
Subsignal
(
"rx_p"
,
Pins
(
"R16"
)
,
Misc
(
"DIFF_TERM=TRUE"
)
),
# rtm_fpga_lvds1_p
Subsignal
(
"rx_n"
,
Pins
(
"R17"
)),
# rtm_fpga_lvds1_n
Subsignal
(
"rx_n"
,
Pins
(
"R17"
)
,
Misc
(
"DIFF_TERM=TRUE"
)
),
# rtm_fpga_lvds1_n
IOStandard
(
"LVDS_25"
)
IOStandard
(
"LVDS_25"
)
),
),
...
...
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Click to expand it.
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