- 07 Jan, 2020 4 commits
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Florent Kermarrec authored
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enjoy-digital authored
add the Hackaday Supercon ECP5 badge
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enjoy-digital authored
Update ecp5_evn.py
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Arnaud Durand authored
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- 06 Jan, 2020 1 commit
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Drew Fustini authored
Add the Hackaday Supercon 2019 badge which has an ECP5 FPGA: https://hackaday.io/project/167255-2019-hackaday-superconference-badge These changes are from Michael Welling's fork: https://github.com/mwelling/linux-on-litex-vexriscv During Supercon, we trying two approaches: - use the built-in 16MB QSPI SRAM - use add-on cartiridge with 32MB SDRAM by Jacob Creedon We were not able to get the QSPI SRAM working so I've removed those changes, and I have just added the changes that are needed to boot Linux with the 32MB SDRAM. Thanks to Jacob Creedon, Greg Davill and Tim Ansell who helped debug. KiCad design files for the SDRAM cartridge are available at: https://github.com/jcreedon/dram-cart/ The SDRAM cartridge PCB is shared at: https://oshpark.com/shared_projects/IQSl2lid More information in this blog post: https://blog.oshpark.com/2019/12/20/ The Hackaday Supercon badge PCB design is here: https://github.com/Spritetm/hadbadge2019_pcb
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- 03 Jan, 2020 1 commit
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Tim Ansell authored
Updating the templates for Fomu.
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- 02 Jan, 2020 1 commit
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Tim 'mithro' Ansell authored
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- 31 Dec, 2019 7 commits
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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enjoy-digital authored
Adding initial support for Saanlima's Pipistrello LX45 board
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Florent Kermarrec authored
targets/de10lite: rename VideoSoC to VGASoC (to avoid confusion with VideoSoC as used on Video designs with framebuffer)
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Florent Kermarrec authored
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enjoy-digital authored
Update de10lite platform
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- 30 Dec, 2019 9 commits
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msloniewski authored
Add VideoSoC build option, based on Frank Buss example.
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msloniewski authored
Use PLL to generate clock for both sys clock domain and clock domain for sdram. Additionally set up clock domain for VGA periph.
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msloniewski authored
Use single image with memory initialization to make more space for SoC ROM sector.
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msloniewski authored
V10 and W10 pins were used in UART periph, causing error when gpio_0 were requested.
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Tim 'mithro' Ansell authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Giammarco Zacheo authored
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- 14 Dec, 2019 5 commits
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Florent Kermarrec authored
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Florent Kermarrec authored
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enjoy-digital authored
Fix numato csr headers
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Derek Kozel authored
get_csr_header parameter with_shadow_base removed/deprecated in litex 2a8d8c8f. New default behavior matches the desired behavior in these targets.
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Derek Kozel authored
litex commit 8be5824e258b84df240d34636aaa539124b92c65 simplified the handling of csr regions and constants.
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- 06 Dec, 2019 4 commits
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Florent Kermarrec authored
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Florent Kermarrec authored
targets: keep attributes are no longer needed since automatically added when applying constraints to signals.
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Florent Kermarrec authored
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Florent Kermarrec authored
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- 03 Dec, 2019 3 commits
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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- 25 Nov, 2019 1 commit
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Sean Cross authored
The SoCCore definition used to be available under litex.soc.integration, however it was removed in https://github.com/enjoy-digital/litex/commit/626533ce9d84ba081aa320dd330f5f0d800333b0 Signed-off-by: Sean Cross <sean@xobs.io>
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- 24 Nov, 2019 1 commit
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Sean Cross authored
Fomu Hacker supports dual spi, so add a "spiflash4x" definition. The litex spi_flash module will run this flash in dual mode, because the `dq` array is only two signals wide. Signed-off-by: Sean Cross <sean@xobs.io>
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- 23 Nov, 2019 1 commit
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Sean Cross authored
This documentation can be fetched using a package such as lxsocdoc. Signed-off-by: Sean Cross <sean@xobs.io>
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- 22 Nov, 2019 1 commit
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Sean Cross authored
These pins were swapped in the definition, which made them not work so well. Signed-off-by: Sean Cross <sean@xobs.io>
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- 16 Nov, 2019 1 commit
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Florent Kermarrec authored
platforms/target: only catch ModuleNotFoundError exceptions to improve error reporting (thanks mwelling)
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