1. 12 Nov, 2018 1 commit
  2. 09 Nov, 2018 3 commits
  3. 08 Nov, 2018 5 commits
  4. 07 Nov, 2018 1 commit
  5. 06 Nov, 2018 8 commits
    • Eial Czerwacki's avatar
      x86/vsmp: Remove dependency on pv_irq_ops · a48777fd
      Eial Czerwacki authored
      
      vSMP dependency on pv_irq_ops has been removed some years ago, but the code
      still deals with pv_irq_ops.
      
      In short, "cap & ctl & (1 << 4)" is always returning 0, so all
      PARAVIRT/PARAVIRT_XXL code related to that can be removed.
      
      However, the rest of the code depends on CONFIG_PCI, so fix it accordingly.
      
      Rename set_vsmp_pv_ops to set_vsmp_ctl as the original name does not make
      sense anymore.
      Signed-off-by: default avatarEial Czerwacki <eial@scalemp.com>
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Acked-by: default avatarShai Fultheim <shai@scalemp.com>
      Cc: Juergen Gross <jgross@suse.com>
      Link: https://lkml.kernel.org/r/1541439114-28297-1-git-send-email-eial@scalemp.com
      a48777fd
    • Kirill A. Shutemov's avatar
      x86/ldt: Remove unused variable in map_ldt_struct() · b082f2dd
      Kirill A. Shutemov authored
      Splitting out the sanity check in map_ldt_struct() moved page table syncing
      into a separate function, which made the pgd variable unused. Remove it.
      
      [ tglx: Massaged changelog ]
      
      Fixes: 9bae3197
      
       ("x86/ldt: Split out sanity check in map_ldt_struct()")
      Signed-off-by: default avatarKirill A. Shutemov <kirill.shutemov@linux.intel.com>
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Reviewed-by: default avatarAndy Lutomirski <luto@kernel.org>
      Cc: bp@alien8.de
      Cc: hpa@zytor.com
      Cc: dave.hansen@linux.intel.com
      Cc: peterz@infradead.org
      Cc: boris.ostrovsky@oracle.com
      Cc: jgross@suse.com
      Cc: bhe@redhat.com
      Cc: willy@infradead.org
      Cc: linux-mm@kvack.org
      Cc: stable@vger.kernel.org
      Link: https://lkml.kernel.org/r/20181026122856.66224-4-kirill.shutemov@linux.intel.com
      b082f2dd
    • Kirill A. Shutemov's avatar
      x86/ldt: Unmap PTEs for the slot before freeing LDT pages · a0e6e083
      Kirill A. Shutemov authored
      modify_ldt(2) leaves the old LDT mapped after switching over to the new
      one. The old LDT gets freed and the pages can be re-used.
      
      Leaving the mapping in place can have security implications. The mapping is
      present in the userspace page tables and Meltdown-like attacks can read
      these freed and possibly reused pages.
      
      It's relatively simple to fix: unmap the old LDT and flush TLB before
      freeing the old LDT memory.
      
      This further allows to avoid flushing the TLB in map_ldt_struct() as the
      slot is unmapped and flushed by unmap_ldt_struct() or has never been mapped
      at all.
      
      [ tglx: Massaged changelog and removed the needless line breaks ]
      
      Fixes: f55f0501
      
       ("x86/pti: Put the LDT in its own PGD if PTI is on")
      Signed-off-by: default avatarKirill A. Shutemov <kirill.shutemov@linux.intel.com>
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Cc: bp@alien8.de
      Cc: hpa@zytor.com
      Cc: dave.hansen@linux.intel.com
      Cc: luto@kernel.org
      Cc: peterz@infradead.org
      Cc: boris.ostrovsky@oracle.com
      Cc: jgross@suse.com
      Cc: bhe@redhat.com
      Cc: willy@infradead.org
      Cc: linux-mm@kvack.org
      Cc: stable@vger.kernel.org
      Link: https://lkml.kernel.org/r/20181026122856.66224-3-kirill.shutemov@linux.intel.com
      a0e6e083
    • Kirill A. Shutemov's avatar
      x86/mm: Move LDT remap out of KASLR region on 5-level paging · d52888aa
      Kirill A. Shutemov authored
      On 5-level paging the LDT remap area is placed in the middle of the KASLR
      randomization region and it can overlap with the direct mapping, the
      vmalloc or the vmap area.
      
      The LDT mapping is per mm, so it cannot be moved into the P4D page table
      next to the CPU_ENTRY_AREA without complicating PGD table allocation for
      5-level paging.
      
      The 4 PGD slot gap just before the direct mapping is reserved for
      hypervisors, so it cannot be used.
      
      Move the direct mapping one slot deeper and use the resulting gap for the
      LDT remap area. The resulting layout is the same for 4 and 5 level paging.
      
      [ tglx: Massaged changelog ]
      
      Fixes: f55f0501
      
       ("x86/pti: Put the LDT in its own PGD if PTI is on")
      Signed-off-by: default avatarKirill A. Shutemov <kirill.shutemov@linux.intel.com>
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Reviewed-by: default avatarAndy Lutomirski <luto@kernel.org>
      Cc: bp@alien8.de
      Cc: hpa@zytor.com
      Cc: dave.hansen@linux.intel.com
      Cc: peterz@infradead.org
      Cc: boris.ostrovsky@oracle.com
      Cc: jgross@suse.com
      Cc: bhe@redhat.com
      Cc: willy@infradead.org
      Cc: linux-mm@kvack.org
      Cc: stable@vger.kernel.org
      Link: https://lkml.kernel.org/r/20181026122856.66224-2-kirill.shutemov@linux.intel.com
      d52888aa
    • Vishal Verma's avatar
      acpi/nfit, x86/mce: Validate a MCE's address before using it · e8a308e5
      Vishal Verma authored
      The NFIT machine check handler uses the physical address from the mce
      structure, and compares it against information in the ACPI NFIT table
      to determine whether that location lies on an NVDIMM. The mce->addr
      field however may not always be valid, and this is indicated by the
      MCI_STATUS_ADDRV bit in the status field.
      
      Export mce_usable_address() which already performs validation for the
      address, and use it in the NFIT handler.
      
      Fixes: 6839a6d9
      
       ("nfit: do an ARS scrub on hitting a latent media error")
      Reported-by: default avatarRobert Elliott <elliott@hpe.com>
      Signed-off-by: default avatarVishal Verma <vishal.l.verma@intel.com>
      Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
      CC: Arnd Bergmann <arnd@arndb.de>
      Cc: Dan Williams <dan.j.williams@intel.com>
      CC: Dave Jiang <dave.jiang@intel.com>
      CC: elliott@hpe.com
      CC: "H. Peter Anvin" <hpa@zytor.com>
      CC: Ingo Molnar <mingo@redhat.com>
      CC: Len Brown <lenb@kernel.org>
      CC: linux-acpi@vger.kernel.org
      CC: linux-edac <linux-edac@vger.ke...
      e8a308e5
    • Vishal Verma's avatar
      acpi/nfit, x86/mce: Handle only uncorrectable machine checks · 5d96c934
      Vishal Verma authored
      The MCE handler for nfit devices is called for memory errors on a
      Non-Volatile DIMM and adds the error location to a 'badblocks' list.
      This list is used by the various NVDIMM drivers to avoid consuming known
      poison locations during IO.
      
      The MCE handler gets called for both corrected and uncorrectable errors.
      Until now, both kinds of errors have been added to the badblocks list.
      However, corrected memory errors indicate that the problem has already
      been fixed by hardware, and the resulting interrupt is merely a
      notification to Linux.
      
      As far as future accesses to that location are concerned, it is
      perfectly fine to use, and thus doesn't need to be included in the above
      badblocks list.
      
      Add a check in the nfit MCE handler to filter out corrected mce events,
      and only process uncorrectable errors.
      
      Fixes: 6839a6d9
      
       ("nfit: do an ARS scrub on hitting a latent media error")
      Reported-by: default avatarOmar Avelar <omar.avelar@intel.com>
      Signed-off-by: default avatarVishal Verma <vishal.l.verma@intel.com>
      Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
      CC: Arnd Bergmann <arnd@arndb.de>
      CC: Dan Williams <dan.j.williams@intel.com>
      CC: Dave Jiang <dave.jiang@intel.com>
      CC: elliott@hpe.com
      CC: "H. Peter Anvin" <hpa@zytor.com>
      CC: Ingo Molnar <mingo@redhat.com>
      CC: Len Brown <lenb@kernel.org>
      CC: linux-acpi@vger.kernel.org
      CC: linux-edac <linux-edac@vger.kernel.org>
      CC: linux-nvdimm@lists.01.org
      CC: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
      CC: "Rafael J. Wysocki" <rjw@rjwysocki.net>
      CC: Ross Zwisler <zwisler@kernel.org>
      CC: stable <stable@vger.kernel.org>
      CC: Thomas Gleixner <tglx@linutronix.de>
      CC: Tony Luck <tony.luck@intel.com>
      CC: x86-ml <x86@kernel.org>
      CC: Yazen Ghannam <yazen.ghannam@amd.com>
      Link: http://lkml.kernel.org/r/20181026003729.8420-1-vishal.l.verma@intel.com
      5d96c934
    • John David Anglin's avatar
      parisc: Revert "Release spinlocks using ordered store" · 86d4d068
      John David Anglin authored
      This reverts commit d27dfa13
      
      .
      
      Unfortunately, this patch needs to be reverted.  We need the full sync
      barrier and not the limited barrier provided by using an ordered store.
      The sync ensures that all accesses and cache purge instructions that
      follow the sync are performed after all such instructions prior the sync
      instruction have completed executing.
      
      The patch breaks the rwlock implementation in glibc.  This caused the
      test-lock application in the libprelude testsuite to hang.  With the
      change reverted, the test runs correctly and the libprelude package
      builds successfully.
      Signed-off-by: default avatarJohn David Anglin <dave.anglin@bell.net>
      Signed-off-by: default avatarHelge Deller <deller@gmx.de>
      86d4d068
    • Ard Biesheuvel's avatar
      ARM: 8809/1: proc-v7: fix Thumb annotation of cpu_v7_hvc_switch_mm · 6282e916
      Ard Biesheuvel authored
      Due to what appears to be a copy/paste error, the opening ENTRY()
      of cpu_v7_hvc_switch_mm() lacks a matching ENDPROC(), and instead,
      the one for cpu_v7_smc_switch_mm() is duplicated.
      
      Given that it is ENDPROC() that emits the Thumb annotation, the
      cpu_v7_hvc_switch_mm() routine will be called in ARM mode on a
      Thumb2 kernel, resulting in the following splat:
      
        Internal error: Oops - undefined instruction: 0 [#1] SMP THUMB2
        Modules linked in:
        CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.18.0-rc1-00030-g4d28ad89189d-dirty #488
        Hardware name: QEMU KVM Virtual Machine, BIOS 0.0.0 02/06/2015
        PC is at cpu_v7_hvc_switch_mm+0x12/0x18
        LR is at flush_old_exec+0x31b/0x570
        pc : [<c0316efe>]    lr : [<c04117c7>]    psr: 00000013
        sp : ee899e50  ip : 00000000  fp : 00000001
        r10: eda28f34  r9 : eda31800  r8 : c12470e0
        r7 : eda1fc00  r6 : eda53000  r5 : 00000000  r4 : ee88c000
        r3 : c0316eec  r2 : 00000001  r1 : eda53000  r0 : 6da6c000
        Flags: nzcv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
      
      Note the 'ISA ARM' in the last line.
      
      Fix this by using the correct name in ENDPROC().
      
      Cc: <stable@vger.kernel.org>
      Fixes: 10115105
      
       ("ARM: spectre-v2: add firmware based hardening")
      Reviewed-by: default avatarDave Martin <Dave.Martin@arm.com>
      Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
      Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
      6282e916
  6. 05 Nov, 2018 13 commits
  7. 04 Nov, 2018 1 commit
    • Michael Kelley's avatar
      x86/hyper-v: Enable PIT shutdown quirk · 1de72c70
      Michael Kelley authored
      
      Hyper-V emulation of the PIT has a quirk such that the normal PIT shutdown
      path doesn't work, because clearing the counter register restarts the
      timer.
      
      Disable the counter clearing on PIT shutdown.
      Signed-off-by: default avatarMichael Kelley <mikelley@microsoft.com>
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Cc: "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>
      Cc: "devel@linuxdriverproject.org" <devel@linuxdriverproject.org>
      Cc: "daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>
      Cc: "virtualization@lists.linux-foundation.org" <virtualization@lists.linux-foundation.org>
      Cc: "jgross@suse.com" <jgross@suse.com>
      Cc: "akataria@vmware.com" <akataria@vmware.com>
      Cc: "olaf@aepfle.de" <olaf@aepfle.de>
      Cc: "apw@canonical.com" <apw@canonical.com>
      Cc: vkuznets <vkuznets@redhat.com>
      Cc: "jasowang@redhat.com" <jasowang@redhat.com>
      Cc: "marcelo.cerri@canonical.com" <marcelo.cerri@canonical.com>
      Cc: KY Srinivasan <kys@microsoft.com>
      Cc: stable@vger.kernel.org
      Link: https://lkml.kernel.org/r/1541303219-11142-3-git-send-email-mikelley@microsoft.com
      1de72c70
  8. 03 Nov, 2018 3 commits
  9. 02 Nov, 2018 5 commits