Commit 6dc1c49d authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'fbcon-locking-fixes' of ssh://people.freedesktop.org/~airlied/linux into drm-next

This pulls in most of Linus tree up to -rc6, this fixes the worst lockdep
reported issues and re-enables fbcon lockdep.

(not the fbcon maintainer)
* 'fbcon-locking-fixes' of ssh://people.freedesktop.org/~airlied/linux: (529 commits)
  Revert "Revert "console: implement lockdep support for console_lock""
  fbcon: fix locking harder
  fb: Yet another band-aid for fixing lockdep mess
  fb: rework locking to fix lock ordering on takeover
parents cd17ef41 5845b81b
......@@ -141,3 +141,4 @@ Version History
1.2.0 Handle creation of arrays that contain failed devices.
1.3.0 Added support for RAID 10
1.3.1 Allow device replacement/rebuild for RAID 10
1.3.2 Fix/improve redundancy checking for RAID10
......@@ -81,7 +81,8 @@ PA31 TXD4
Required properties for pin configuration node:
- atmel,pins: 4 integers array, represents a group of pins mux and config
setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
The PERIPH 0 means gpio.
The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
Bits used for CONFIG:
PULL_UP (1 << 0): indicate this pin need a pull up.
......@@ -126,7 +127,7 @@ pinctrl@fffff400 {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
<1 14 0x1 0x0 /* PB14 periph A */
1 15 0x1 0x1>; /* PB15 periph with pullup */
1 15 0x1 0x1>; /* PB15 periph A with pullup */
};
};
};
......
......@@ -175,9 +175,9 @@ consists of multiple segments as described below.
align with the zone size <-|
|-> align with the segment size
_________________________________________________________________________
| | | Node | Segment | Segment | |
| Superblock | Checkpoint | Address | Info. | Summary | Main |
| (SB) | (CP) | Table (NAT) | Table (SIT) | Area (SSA) | |
| | | Segment | Node | Segment | |
| Superblock | Checkpoint | Info. | Address | Summary | Main |
| (SB) | (CP) | Table (SIT) | Table (NAT) | Area (SSA) | |
|____________|_____2______|______N______|______N______|______N_____|__N___|
. .
. .
......@@ -200,14 +200,14 @@ consists of multiple segments as described below.
: It contains file system information, bitmaps for valid NAT/SIT sets, orphan
inode lists, and summary entries of current active segments.
- Node Address Table (NAT)
: It is composed of a block address table for all the node blocks stored in
Main area.
- Segment Information Table (SIT)
: It contains segment information such as valid block count and bitmap for the
validity of all the blocks.
- Node Address Table (NAT)
: It is composed of a block address table for all the node blocks stored in
Main area.
- Segment Summary Area (SSA)
: It contains summary entries which contains the owner information of all the
data and node blocks stored in Main area.
......@@ -236,13 +236,13 @@ For file system consistency, each CP points to which NAT and SIT copies are
valid, as shown as below.
+--------+----------+---------+
| CP | NAT | SIT |
| CP | SIT | NAT |
+--------+----------+---------+
. . . .
. . . .
. . . .
+-------+-------+--------+--------+--------+--------+
| CP #0 | CP #1 | NAT #0 | NAT #1 | SIT #0 | SIT #1 |
| CP #0 | CP #1 | SIT #0 | SIT #1 | NAT #0 | NAT #1 |
+-------+-------+--------+--------+--------+--------+
| ^ ^
| | |
......
File mode changed from 100755 to 100644
......@@ -2438,7 +2438,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
real-time workloads. It can also improve energy
efficiency for asymmetric multiprocessors.
rcu_nocbs_poll [KNL,BOOT]
rcu_nocb_poll [KNL,BOOT]
Rather than requiring that offloaded CPUs
(specified by rcu_nocbs= above) explicitly
awaken the corresponding "rcuoN" kthreads,
......
......@@ -57,6 +57,10 @@ Protocol 2.10: (Kernel 2.6.31) Added a protocol for relaxed alignment
Protocol 2.11: (Kernel 3.6) Added a field for offset of EFI handover
protocol entry point.
Protocol 2.12: (Kernel 3.8) Added the xloadflags field and extension fields
to struct boot_params for for loading bzImage and ramdisk
above 4G in 64bit.
**** MEMORY LAYOUT
The traditional memory map for the kernel loader, used for Image or
......@@ -182,7 +186,7 @@ Offset Proto Name Meaning
0230/4 2.05+ kernel_alignment Physical addr alignment required for kernel
0234/1 2.05+ relocatable_kernel Whether kernel is relocatable or not
0235/1 2.10+ min_alignment Minimum alignment, as a power of two
0236/2 N/A pad3 Unused
0236/2 2.12+ xloadflags Boot protocol option flags
0238/4 2.06+ cmdline_size Maximum size of the kernel command line
023C/4 2.07+ hardware_subarch Hardware subarchitecture
0240/8 2.07+ hardware_subarch_data Subarchitecture-specific data
......@@ -582,6 +586,27 @@ Protocol: 2.10+
misaligned kernel. Therefore, a loader should typically try each
power-of-two alignment from kernel_alignment down to this alignment.
Field name: xloadflags
Type: read
Offset/size: 0x236/2
Protocol: 2.12+
This field is a bitmask.
Bit 0 (read): XLF_KERNEL_64
- If 1, this kernel has the legacy 64-bit entry point at 0x200.
Bit 1 (read): XLF_CAN_BE_LOADED_ABOVE_4G
- If 1, kernel/boot_params/cmdline/ramdisk can be above 4G.
Bit 2 (read): XLF_EFI_HANDOVER_32
- If 1, the kernel supports the 32-bit EFI handoff entry point
given at handover_offset.
Bit 3 (read): XLF_EFI_HANDOVER_64
- If 1, the kernel supports the 64-bit EFI handoff entry point
given at handover_offset + 0x200.
Field name: cmdline_size
Type: read
Offset/size: 0x238/4
......
......@@ -19,6 +19,9 @@ Offset Proto Name Meaning
090/010 ALL hd1_info hd1 disk parameter, OBSOLETE!!
0A0/010 ALL sys_desc_table System description table (struct sys_desc_table)
0B0/010 ALL olpc_ofw_header OLPC's OpenFirmware CIF and friends
0C0/004 ALL ext_ramdisk_image ramdisk_image high 32bits
0C4/004 ALL ext_ramdisk_size ramdisk_size high 32bits
0C8/004 ALL ext_cmd_line_ptr cmd_line_ptr high 32bits
140/080 ALL edid_info Video mode setup (struct edid_info)
1C0/020 ALL efi_info EFI 32 information (struct efi_info)
1E0/004 ALL alk_mem_k Alternative mem check, in KB
......@@ -27,6 +30,7 @@ Offset Proto Name Meaning
1E9/001 ALL eddbuf_entries Number of entries in eddbuf (below)
1EA/001 ALL edd_mbr_sig_buf_entries Number of entries in edd_mbr_sig_buffer
(below)
1EF/001 ALL sentinel Used to detect broken bootloaders
290/040 ALL edd_mbr_sig_buffer EDD MBR signatures
2D0/A00 ALL e820_map E820 memory map table
(array of struct e820entry)
......
......@@ -2966,7 +2966,7 @@ S: Maintained
F: drivers/net/ethernet/i825xx/eexpress.*
ETHERNET BRIDGE
M: Stephen Hemminger <shemminger@vyatta.com>
M: Stephen Hemminger <stephen@networkplumber.org>
L: bridge@lists.linux-foundation.org
L: netdev@vger.kernel.org
W: http://www.linuxfoundation.org/en/Net:Bridge
......@@ -4905,7 +4905,7 @@ S: Maintained
MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2)
M: Mirko Lindner <mlindner@marvell.com>
M: Stephen Hemminger <shemminger@vyatta.com>
M: Stephen Hemminger <stephen@networkplumber.org>
L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/ethernet/marvell/sk*
......@@ -5180,7 +5180,7 @@ S: Supported
F: drivers/infiniband/hw/nes/
NETEM NETWORK EMULATOR
M: Stephen Hemminger <shemminger@vyatta.com>
M: Stephen Hemminger <stephen@networkplumber.org>
L: netem@lists.linux-foundation.org
S: Maintained
F: net/sched/sch_netem.c
......@@ -6585,7 +6585,7 @@ F: drivers/media/platform/s3c-camif/
F: include/media/s3c_camif.h
SERIAL DRIVERS
M: Alan Cox <alan@linux.intel.com>
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
L: linux-serial@vger.kernel.org
S: Maintained
F: drivers/tty/serial
......@@ -7088,7 +7088,7 @@ F: include/uapi/sound/
F: sound/
SOUND - SOC LAYER / DYNAMIC AUDIO POWER MANAGEMENT (ASoC)
M: Liam Girdwood <lrg@ti.com>
M: Liam Girdwood <lgirdwood@gmail.com>
M: Mark Brown <broonie@opensource.wolfsonmicro.com>
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
......
VERSION = 3
PATCHLEVEL = 8
SUBLEVEL = 0
EXTRAVERSION = -rc4
NAME = Terrified Chipmunk
EXTRAVERSION = -rc6
NAME = Unicycling Gorilla
# *DOCUMENTATION*
# To see a list of typical targets execute "make help"
......@@ -169,7 +169,7 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
-e s/arm.*/arm/ -e s/sa110/arm/ \
-e s/s390x/s390/ -e s/parisc64/parisc/ \
-e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
-e s/sh[234].*/sh/ )
-e s/sh[234].*/sh/ -e s/aarch64.*/arm64/ )
# Cross compiling and selecting different set of gcc/bin-utils
# ---------------------------------------------------------------------------
......
......@@ -26,7 +26,7 @@
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
reg = <0x00000000 0x40000000>; /* 1 GB */
};
soc {
......
......@@ -50,27 +50,25 @@
};
gpio0: gpio@d0018100 {
compatible = "marvell,armadaxp-gpio";
reg = <0xd0018100 0x40>,
<0xd0018800 0x30>;
compatible = "marvell,orion-gpio";
reg = <0xd0018100 0x40>;
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupts-cells = <2>;
interrupts = <16>, <17>, <18>, <19>;
interrupts = <82>, <83>, <84>, <85>;
};
gpio1: gpio@d0018140 {
compatible = "marvell,armadaxp-gpio";
reg = <0xd0018140 0x40>,
<0xd0018840 0x30>;
compatible = "marvell,orion-gpio";
reg = <0xd0018140 0x40>;
ngpios = <17>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupts-cells = <2>;
interrupts = <20>, <21>, <22>;
interrupts = <87>, <88>, <89>;
};
};
};
......@@ -51,39 +51,36 @@
};
gpio0: gpio@d0018100 {
compatible = "marvell,armadaxp-gpio";
reg = <0xd0018100 0x40>,
<0xd0018800 0x30>;
compatible = "marvell,orion-gpio";
reg = <0xd0018100 0x40>;
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupts-cells = <2>;
interrupts = <16>, <17>, <18>, <19>;
interrupts = <82>, <83>, <84>, <85>;
};
gpio1: gpio@d0018140 {
compatible = "marvell,armadaxp-gpio";
reg = <0xd0018140 0x40>,
<0xd0018840 0x30>;
compatible = "marvell,orion-gpio";
reg = <0xd0018140 0x40>;
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupts-cells = <2>;
interrupts = <20>, <21>, <22>, <23>;
interrupts = <87>, <88>, <89>, <90>;
};
gpio2: gpio@d0018180 {
compatible = "marvell,armadaxp-gpio";
reg = <0xd0018180 0x40>,
<0xd0018870 0x30>;
compatible = "marvell,orion-gpio";
reg = <0xd0018180 0x40>;
ngpios = <3>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupts-cells = <2>;
interrupts = <24>;
interrupts = <91>;
};
ethernet@d0034000 {
......
......@@ -66,39 +66,36 @@
};
gpio0: gpio@d0018100 {
compatible = "marvell,armadaxp-gpio";
reg = <0xd0018100 0x40>,
<0xd0018800 0x30>;
compatible = "marvell,orion-gpio";
reg = <0xd0018100 0x40>;
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupts-cells = <2>;
interrupts = <16>, <17>, <18>, <19>;
interrupts = <82>, <83>, <84>, <85>;
};
gpio1: gpio@d0018140 {
compatible = "marvell,armadaxp-gpio";
reg = <0xd0018140 0x40>,
<0xd0018840 0x30>;
compatible = "marvell,orion-gpio";
reg = <0xd0018140 0x40>;
ngpios = <32>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupts-cells = <2>;
interrupts = <20>, <21>, <22>, <23>;
interrupts = <87>, <88>, <89>, <90>;
};
gpio2: gpio@d0018180 {
compatible = "marvell,armadaxp-gpio";
reg = <0xd0018180 0x40>,
<0xd0018870 0x30>;
compatible = "marvell,orion-gpio";
reg = <0xd0018180 0x40>;
ngpios = <3>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupts-cells = <2>;
interrupts = <24>;
interrupts = <91>;
};
ethernet@d0034000 {
......
......@@ -336,8 +336,8 @@
i2c@0 {
compatible = "i2c-gpio";
gpios = <&pioA 23 0 /* sda */
&pioA 24 0 /* scl */
gpios = <&pioA 25 0 /* sda */
&pioA 26 0 /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
......
......@@ -143,6 +143,11 @@
atmel,pins =
<0 3 0x1 0x0>; /* PA3 periph A */
};
pinctrl_usart0_sck: usart0_sck-0 {
atmel,pins =
<0 4 0x1 0x0>; /* PA4 periph A */
};
};
usart1 {
......@@ -154,12 +159,17 @@
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
<3 27 0x3 0x0>; /* PC27 periph C */
<2 27 0x3 0x0>; /* PC27 periph C */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
<3 28 0x3 0x0>; /* PC28 periph C */
<2 28 0x3 0x0>; /* PC28 periph C */
};
pinctrl_usart1_sck: usart1_sck-0 {
atmel,pins =
<2 28 0x3 0x0>; /* PC29 periph C */
};
};
......@@ -172,46 +182,56 @@
pinctrl_uart2_rts: uart2_rts-0 {
atmel,pins =
<0 0 0x2 0x0>; /* PB0 periph B */
<1 0 0x2 0x0>; /* PB0 periph B */
};
pinctrl_uart2_cts: uart2_cts-0 {
atmel,pins =
<0 1 0x2 0x0>; /* PB1 periph B */
<1 1 0x2 0x0>; /* PB1 periph B */
};
pinctrl_usart2_sck: usart2_sck-0 {
atmel,pins =
<1 2 0x2 0x0>; /* PB2 periph B */
};
};
usart3 {
pinctrl_uart3: usart3-0 {
atmel,pins =
<3 23 0x2 0x1 /* PC22 periph B with pullup */
3 23 0x2 0x0>; /* PC23 periph B */
<2 23 0x2 0x1 /* PC22 periph B with pullup */
2 23 0x2 0x0>; /* PC23 periph B */
};
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
<3 24 0x2 0x0>; /* PC24 periph B */
<2 24 0x2 0x0>; /* PC24 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
<3 25 0x2 0x0>; /* PC25 periph B */
<2 25 0x2 0x0>; /* PC25 periph B */
};
pinctrl_usart3_sck: usart3_sck-0 {
atmel,pins =
<2 26 0x2 0x0>; /* PC26 periph B */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
<3 8 0x3 0x0 /* PC8 periph C */
3 9 0x3 0x1>; /* PC9 periph C with pullup */
<2 8 0x3 0x0 /* PC8 periph C */
2 9 0x3 0x1>; /* PC9 periph C with pullup */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
<3 16 0x3 0x0 /* PC16 periph C */
3 17 0x3 0x1>; /* PC17 periph C with pullup */
<2 16 0x3 0x0 /* PC16 periph C */
2 17 0x3 0x1>; /* PC17 periph C with pullup */
};
};
......@@ -240,14 +260,14 @@
pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
atmel,pins =
<1 8 0x1 0x0 /* PA8 periph A */
1 11 0x1 0x0 /* PA11 periph A */
1 12 0x1 0x0 /* PA12 periph A */
1 13 0x1 0x0 /* PA13 periph A */
1 14 0x1 0x0 /* PA14 periph A */
1 15 0x1 0x0 /* PA15 periph A */
1 16 0x1 0x0 /* PA16 periph A */
1 17 0x1 0x0>; /* PA17 periph A */
<1 8 0x1 0x0 /* PB8 periph A */
1 11 0x1 0x0 /* PB11 periph A */
1 12 0x1 0x0 /* PB12 periph A */
1 13 0x1 0x0 /* PB13 periph A */
1 14 0x1 0x0 /* PB14 periph A */
1 15 0x1 0x0 /* PB15 periph A */
1 16 0x1 0x0 /* PB16 periph A */
1 17 0x1 0x0>; /* PB17 periph A */
};
};
......
......@@ -96,8 +96,8 @@
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3 3>;
samsung,dw-mshc-ddr-timing = <1 2 3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 {
reg = <0>;
......@@ -120,8 +120,8 @@
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3 3>;
samsung,dw-mshc-ddr-timing = <1 2 3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 {
reg = <0>;
......@@ -141,8 +141,8 @@
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3 3>;
samsung,dw-mshc-ddr-timing = <1 2 3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 {
reg = <0>;
......
......@@ -26,10 +26,15 @@
};
&uart0 { status = "okay"; };
&sdio0 { status = "okay"; };
&sata0 { status = "okay"; };
&i2c0 { status = "okay"; };
&sdio0 {
status = "okay";
/* sdio0 card detect is connected to wrong pin on CuBox */
cd-gpios = <&gpio0 12 1>;
};
&spi0 {
status = "okay";
......@@ -42,9 +47,14 @@
};
&pinctrl {
pinctrl-0 = <&pmx_gpio_18>;
pinctrl-0 = <&pmx_gpio_12 &pmx_gpio_18>;
pinctrl-names = "default";
pmx_gpio_12: pmx-gpio-12 {
marvell,pins = "mpp12";
marvell,function = "gpio";
};
pmx_gpio_18: pmx-gpio-18 {
marvell,pins = "mpp18";
marvell,function = "gpio";
......
......@@ -115,8 +115,8 @@
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3 3>;
samsung,dw-mshc-ddr-timing = <1 2 3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 {
reg = <0>;
......@@ -139,8 +139,8 @@
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3 3>;
samsung,dw-mshc-ddr-timing = <1 2 3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 {
reg = <0>;
......
/include/ "kirkwood.dtsi"
/include/ "kirkwood-6281.dtsi"
/ {
chosen {
......@@ -6,6 +7,21 @@
};
ocp@f1000000 {
pinctrl: pinctrl@10000 {
pinctrl-0 = < &pmx_spi &pmx_twsi0 &pmx_uart0
&pmx_ns2_sata0 &pmx_ns2_sata1>;
pinctrl-names = "default";
pmx_ns2_sata0: pmx-ns2-sata0 {
marvell,pins = "mpp21";
marvell,function = "sata0";
};
pmx_ns2_sata1: pmx-ns2-sata1 {
marvell,pins = "mpp20";
marvell,function = "sata1";
};
};
serial@12000 {
clock-frequency = <166666667>;
status = "okay";
......
......@@ -36,6 +36,7 @@
reg = <0x10100 0x40>;
ngpios = <32>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <35>, <36>, <37>, <38>;
};
......@@ -46,6 +47,7 @@
reg = <0x10140 0x40>;
ngpios = <18>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <39>, <40>, <41>;
};
......
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