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Commit 6afc0c26 authored by Ingo Molnar's avatar Ingo Molnar
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Merge branch 'linus' into perf/core, to pick up fixes before applying new changes 

Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents 968d712a 097f70b3
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Showing with 158 additions and 143 deletions
arch/arm/boot/dts/am57xx-beagle-x15.dts
View file @ 6afc0c26
...@@ -98,13 +98,6 @@ ...@@ -98,13 +98,6 @@
pinctrl-0 = <&extcon_usb1_pins>; pinctrl-0 = <&extcon_usb1_pins>;
}; };
extcon_usb2: extcon_usb2 {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&gpio7 24 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&extcon_usb2_pins>;
};
hdmi0: connector { hdmi0: connector {
compatible = "hdmi-connector"; compatible = "hdmi-connector";
label = "hdmi"; label = "hdmi";
...@@ -326,12 +319,6 @@ ...@@ -326,12 +319,6 @@
>; >;
}; };
extcon_usb2_pins: extcon_usb2_pins {
pinctrl-single,pins = <
0x3e8 (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_ctsn.gpio7_24 */
>;
};
tpd12s015_pins: pinmux_tpd12s015_pins { tpd12s015_pins: pinmux_tpd12s015_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
0x3b0 (PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */ 0x3b0 (PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
...@@ -432,7 +419,7 @@ ...@@ -432,7 +419,7 @@
}; };
ldo3_reg: ldo3 { ldo3_reg: ldo3 {
/* VDDA_1V8_PHY */ /* VDDA_1V8_PHYA */
regulator-name = "ldo3"; regulator-name = "ldo3";
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
...@@ -440,6 +427,15 @@ ...@@ -440,6 +427,15 @@
regulator-boot-on; regulator-boot-on;
}; };
ldo4_reg: ldo4 {
/* VDDA_1V8_PHYB */
regulator-name = "ldo4";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldo9_reg: ldo9 { ldo9_reg: ldo9 {
/* VDD_RTC */ /* VDD_RTC */
regulator-name = "ldo9"; regulator-name = "ldo9";
...@@ -495,6 +491,14 @@ ...@@ -495,6 +491,14 @@
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
}; };
extcon_usb2: tps659038_usb {
compatible = "ti,palmas-usb-vid";
ti,enable-vbus-detection;
ti,enable-id-detection;
id-gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>;
};
}; };
tmp102: tmp102@48 { tmp102: tmp102@48 {
...@@ -517,7 +521,8 @@ ...@@ -517,7 +521,8 @@
mcp_rtc: rtc@6f { mcp_rtc: rtc@6f {
compatible = "microchip,mcp7941x"; compatible = "microchip,mcp7941x";
reg = <0x6f>; reg = <0x6f>;
interrupts = <GIC_SPI 2 IRQ_TYPE_EDGE_RISING>; /* IRQ_SYS_1N */ interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
<&dra7_pmx_core 0x424>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&mcp79410_pins_default>; pinctrl-0 = <&mcp79410_pins_default>;
...@@ -579,7 +584,6 @@ ...@@ -579,7 +584,6 @@
pinctrl-0 = <&mmc1_pins_default>; pinctrl-0 = <&mmc1_pins_default>;
vmmc-supply = <&ldo1_reg>; vmmc-supply = <&ldo1_reg>;
vmmc_aux-supply = <&vdd_3v3>;
bus-width = <4>; bus-width = <4>;
cd-gpios = <&gpio6 27 0>; /* gpio 219 */ cd-gpios = <&gpio6 27 0>; /* gpio 219 */
}; };
...@@ -623,6 +627,14 @@ ...@@ -623,6 +627,14 @@
}; };
&usb2 { &usb2 {
/*
* Stand alone usage is peripheral only.
* However, with some resistor modifications
* this port can be used via expansion connectors
* as "host" or "dual-role". If so, provide
* the necessary dr_mode override in the expansion
* board's DT.
*/
dr_mode = "peripheral"; dr_mode = "peripheral";
}; };
...@@ -681,7 +693,7 @@ ...@@ -681,7 +693,7 @@
&hdmi { &hdmi {
status = "ok"; status = "ok";
vdda-supply = <&ldo3_reg>; vdda-supply = <&ldo4_reg>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&hdmi_pins>; pinctrl-0 = <&hdmi_pins>;
......
arch/arm/boot/dts/dm8148-evm.dts
View file @ 6afc0c26
...@@ -19,10 +19,10 @@ ...@@ -19,10 +19,10 @@
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii"; phy-mode = "rgmii";
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy_id = <&davinci_mdio>, <1>;
phy-mode = "mii"; phy-mode = "rgmii";
}; };
arch/arm/boot/dts/dm8148-t410.dts
View file @ 6afc0c26
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
#include "dm814x.dtsi" #include "dm814x.dtsi"
/ { / {
model = "DM8148 EVM"; model = "HP t410 Smart Zero Client";
compatible = "hp,t410", "ti,dm8148"; compatible = "hp,t410", "ti,dm8148";
memory { memory {
...@@ -19,10 +19,10 @@ ...@@ -19,10 +19,10 @@
&cpsw_emac0 { &cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>; phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii"; phy-mode = "rgmii";
}; };
&cpsw_emac1 { &cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>; phy_id = <&davinci_mdio>, <1>;
phy-mode = "mii"; phy-mode = "rgmii";
}; };
arch/arm/boot/dts/dm814x.dtsi
View file @ 6afc0c26
...@@ -181,9 +181,9 @@ ...@@ -181,9 +181,9 @@
ti,hwmods = "timer3"; ti,hwmods = "timer3";
}; };
control: control@160000 { control: control@140000 {
compatible = "ti,dm814-scm", "simple-bus"; compatible = "ti,dm814-scm", "simple-bus";
reg = <0x160000 0x16d000>; reg = <0x140000 0x16d000>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0x160000 0x16d000>; ranges = <0 0x160000 0x16d000>;
...@@ -321,9 +321,9 @@ ...@@ -321,9 +321,9 @@
mac-address = [ 00 00 00 00 00 00 ]; mac-address = [ 00 00 00 00 00 00 ];
}; };
phy_sel: cpsw-phy-sel@0x48160650 { phy_sel: cpsw-phy-sel@48140650 {
compatible = "ti,am3352-cpsw-phy-sel"; compatible = "ti,am3352-cpsw-phy-sel";
reg= <0x48160650 0x4>; reg= <0x48140650 0x4>;
reg-names = "gmii-sel"; reg-names = "gmii-sel";
}; };
}; };
......
arch/arm/boot/dts/dra7.dtsi
View file @ 6afc0c26
...@@ -120,9 +120,10 @@ ...@@ -120,9 +120,10 @@
reg = <0x0 0x1400>; reg = <0x0 0x1400>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0x0 0x1400>;
pbias_regulator: pbias_regulator { pbias_regulator: pbias_regulator {
compatible = "ti,pbias-omap"; compatible = "ti,pbias-dra7", "ti,pbias-omap";
reg = <0xe00 0x4>; reg = <0xe00 0x4>;
syscon = <&scm_conf>; syscon = <&scm_conf>;
pbias_mmc_reg: pbias_mmc_omap5 { pbias_mmc_reg: pbias_mmc_omap5 {
...@@ -1417,7 +1418,7 @@ ...@@ -1417,7 +1418,7 @@
ti,irqs-safe-map = <0>; ti,irqs-safe-map = <0>;
}; };
mac: ethernet@4a100000 { mac: ethernet@48484000 {
compatible = "ti,dra7-cpsw","ti,cpsw"; compatible = "ti,dra7-cpsw","ti,cpsw";
ti,hwmods = "gmac"; ti,hwmods = "gmac";
clocks = <&dpll_gmac_ck>, <&gmac_gmii_ref_clk_div>; clocks = <&dpll_gmac_ck>, <&gmac_gmii_ref_clk_div>;
......
arch/arm/boot/dts/omap2430.dtsi
View file @ 6afc0c26
...@@ -56,6 +56,7 @@ ...@@ -56,6 +56,7 @@
reg = <0x270 0x240>; reg = <0x270 0x240>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0x270 0x240>;
scm_clocks: clocks { scm_clocks: clocks {
#address-cells = <1>; #address-cells = <1>;
...@@ -63,7 +64,7 @@ ...@@ -63,7 +64,7 @@
}; };
pbias_regulator: pbias_regulator { pbias_regulator: pbias_regulator {
compatible = "ti,pbias-omap"; compatible = "ti,pbias-omap2", "ti,pbias-omap";
reg = <0x230 0x4>; reg = <0x230 0x4>;
syscon = <&scm_conf>; syscon = <&scm_conf>;
pbias_mmc_reg: pbias_mmc_omap2430 { pbias_mmc_reg: pbias_mmc_omap2430 {
......
arch/arm/boot/dts/omap3-beagle.dts
View file @ 6afc0c26
...@@ -202,7 +202,7 @@ ...@@ -202,7 +202,7 @@
tfp410_pins: pinmux_tfp410_pins { tfp410_pins: pinmux_tfp410_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
0x194 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */ 0x196 (PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
>; >;
}; };
......
arch/arm/boot/dts/omap3-igep.dtsi
View file @ 6afc0c26
...@@ -78,12 +78,6 @@ ...@@ -78,12 +78,6 @@
>; >;
}; };
smsc9221_pins: pinmux_smsc9221_pins {
pinctrl-single,pins = <
0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
>;
};
i2c1_pins: pinmux_i2c1_pins { i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
......
arch/arm/boot/dts/omap3-igep0020-common.dtsi
View file @ 6afc0c26
...@@ -156,6 +156,12 @@ ...@@ -156,6 +156,12 @@
OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
>; >;
}; };
smsc9221_pins: pinmux_smsc9221_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */
>;
};
}; };
&omap3_pmx_core2 { &omap3_pmx_core2 {
......
arch/arm/boot/dts/omap3.dtsi
View file @ 6afc0c26
...@@ -113,10 +113,22 @@ ...@@ -113,10 +113,22 @@
}; };
scm_conf: scm_conf@270 { scm_conf: scm_conf@270 {
compatible = "syscon"; compatible = "syscon", "simple-bus";
reg = <0x270 0x330>; reg = <0x270 0x330>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0x270 0x330>;
pbias_regulator: pbias_regulator {
compatible = "ti,pbias-omap3", "ti,pbias-omap";
reg = <0x2b0 0x4>;
syscon = <&scm_conf>;
pbias_mmc_reg: pbias_mmc_omap2430 {
regulator-name = "pbias_mmc_omap2430";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3000000>;
};
};
scm_clocks: clocks { scm_clocks: clocks {
#address-cells = <1>; #address-cells = <1>;
...@@ -202,17 +214,6 @@ ...@@ -202,17 +214,6 @@
dma-requests = <96>; dma-requests = <96>;
}; };
pbias_regulator: pbias_regulator {
compatible = "ti,pbias-omap";
reg = <0x2b0 0x4>;
syscon = <&scm_conf>;
pbias_mmc_reg: pbias_mmc_omap2430 {
regulator-name = "pbias_mmc_omap2430";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3000000>;
};
};
gpio1: gpio@48310000 { gpio1: gpio@48310000 {
compatible = "ti,omap3-gpio"; compatible = "ti,omap3-gpio";
reg = <0x48310000 0x200>; reg = <0x48310000 0x200>;
......
arch/arm/boot/dts/omap4.dtsi
View file @ 6afc0c26
...@@ -196,9 +196,10 @@ ...@@ -196,9 +196,10 @@
reg = <0x5a0 0x170>; reg = <0x5a0 0x170>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0x5a0 0x170>;
pbias_regulator: pbias_regulator { pbias_regulator: pbias_regulator {
compatible = "ti,pbias-omap"; compatible = "ti,pbias-omap4", "ti,pbias-omap";
reg = <0x60 0x4>; reg = <0x60 0x4>;
syscon = <&omap4_padconf_global>; syscon = <&omap4_padconf_global>;
pbias_mmc_reg: pbias_mmc_omap4 { pbias_mmc_reg: pbias_mmc_omap4 {
......
arch/arm/boot/dts/omap5-uevm.dts
View file @ 6afc0c26
...@@ -174,8 +174,8 @@ ...@@ -174,8 +174,8 @@
i2c5_pins: pinmux_i2c5_pins { i2c5_pins: pinmux_i2c5_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */ 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */ 0x188 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
>; >;
}; };
......
arch/arm/boot/dts/omap5.dtsi
View file @ 6afc0c26
...@@ -185,9 +185,10 @@ ...@@ -185,9 +185,10 @@
reg = <0x5a0 0xec>; reg = <0x5a0 0xec>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0x5a0 0xec>;
pbias_regulator: pbias_regulator { pbias_regulator: pbias_regulator {
compatible = "ti,pbias-omap"; compatible = "ti,pbias-omap5", "ti,pbias-omap";
reg = <0x60 0x4>; reg = <0x60 0x4>;
syscon = <&omap5_padconf_global>; syscon = <&omap5_padconf_global>;
pbias_mmc_reg: pbias_mmc_omap5 { pbias_mmc_reg: pbias_mmc_omap5 {
......
arch/arm/boot/dts/rk3288-veyron.dtsi
View file @ 6afc0c26
...@@ -158,6 +158,7 @@ ...@@ -158,6 +158,7 @@
}; };
&hdmi { &hdmi {
ddc-i2c-bus = <&i2c5>;
status = "okay"; status = "okay";
}; };
......
arch/arm/boot/dts/stih407.dtsi
View file @ 6afc0c26
...@@ -103,48 +103,46 @@ ...@@ -103,48 +103,46 @@
<&clk_s_d0_quadfs 0>, <&clk_s_d0_quadfs 0>,
<&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 0>; <&clk_s_d2_quadfs 0>;
ranges; };
sti-hdmi@8d04000 { sti-hdmi@8d04000 {
compatible = "st,stih407-hdmi"; compatible = "st,stih407-hdmi";
reg = <0x8d04000 0x1000>; reg = <0x8d04000 0x1000>;
reg-names = "hdmi-reg"; reg-names = "hdmi-reg";
interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>; interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
interrupt-names = "irq"; interrupt-names = "irq";
clock-names = "pix", clock-names = "pix",
"tmds", "tmds",
"phy", "phy",
"audio", "audio",
"main_parent", "main_parent",
"aux_parent"; "aux_parent";
clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
<&clk_s_d2_flexgen CLK_TMDS_HDMI>, <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
<&clk_s_d2_flexgen CLK_REF_HDMIPHY>, <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
<&clk_s_d0_flexgen CLK_PCM_0>, <&clk_s_d0_flexgen CLK_PCM_0>,
<&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>; <&clk_s_d2_quadfs 1>;
hdmi,hpd-gpio = <&pio5 3>; hdmi,hpd-gpio = <&pio5 3>;
reset-names = "hdmi"; reset-names = "hdmi";
resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>; resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
ddc = <&hdmiddc>; ddc = <&hdmiddc>;
};
};
sti-hda@8d02000 {
sti-hda@8d02000 { compatible = "st,stih407-hda";
compatible = "st,stih407-hda"; reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
reg = <0x8d02000 0x400>, <0x92b0120 0x4>; reg-names = "hda-reg", "video-dacs-ctrl";
reg-names = "hda-reg", "video-dacs-ctrl"; clock-names = "pix",
clock-names = "pix", "hddac",
"hddac", "main_parent",
"main_parent", "aux_parent";
"aux_parent"; clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>, <&clk_s_d2_flexgen CLK_HDDAC>,
<&clk_s_d2_flexgen CLK_HDDAC>, <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 1>;
<&clk_s_d2_quadfs 1>;
};
}; };
}; };
}; };
......
arch/arm/boot/dts/stih410.dtsi
View file @ 6afc0c26
...@@ -178,48 +178,46 @@ ...@@ -178,48 +178,46 @@
<&clk_s_d0_quadfs 0>, <&clk_s_d0_quadfs 0>,
<&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 0>; <&clk_s_d2_quadfs 0>;
ranges; };
sti-hdmi@8d04000 { sti-hdmi@8d04000 {
compatible = "st,stih407-hdmi"; compatible = "st,stih407-hdmi";
reg = <0x8d04000 0x1000>; reg = <0x8d04000 0x1000>;
reg-names = "hdmi-reg"; reg-names = "hdmi-reg";
interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>; interrupts = <GIC_SPI 106 IRQ_TYPE_NONE>;
interrupt-names = "irq"; interrupt-names = "irq";
clock-names = "pix", clock-names = "pix",
"tmds", "tmds",
"phy", "phy",
"audio", "audio",
"main_parent", "main_parent",
"aux_parent"; "aux_parent";
clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>, clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
<&clk_s_d2_flexgen CLK_TMDS_HDMI>, <&clk_s_d2_flexgen CLK_TMDS_HDMI>,
<&clk_s_d2_flexgen CLK_REF_HDMIPHY>, <&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
<&clk_s_d0_flexgen CLK_PCM_0>, <&clk_s_d0_flexgen CLK_PCM_0>,
<&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 1>; <&clk_s_d2_quadfs 1>;
hdmi,hpd-gpio = <&pio5 3>; hdmi,hpd-gpio = <&pio5 3>;
reset-names = "hdmi"; reset-names = "hdmi";
resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>; resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
ddc = <&hdmiddc>; ddc = <&hdmiddc>;
};
};
sti-hda@8d02000 {
sti-hda@8d02000 { compatible = "st,stih407-hda";
compatible = "st,stih407-hda"; reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
reg = <0x8d02000 0x400>, <0x92b0120 0x4>; reg-names = "hda-reg", "video-dacs-ctrl";
reg-names = "hda-reg", "video-dacs-ctrl"; clock-names = "pix",
clock-names = "pix", "hddac",
"hddac", "main_parent",
"main_parent", "aux_parent";
"aux_parent"; clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>, <&clk_s_d2_flexgen CLK_HDDAC>,
<&clk_s_d2_flexgen CLK_HDDAC>, <&clk_s_d2_quadfs 0>,
<&clk_s_d2_quadfs 0>, <&clk_s_d2_quadfs 1>;
<&clk_s_d2_quadfs 1>;
};
}; };
}; };
......
arch/arm/common/it8152.c
View file @ 6afc0c26
...@@ -95,7 +95,7 @@ void it8152_init_irq(void) ...@@ -95,7 +95,7 @@ void it8152_init_irq(void)
} }
} }
void it8152_irq_demux(unsigned int irq, struct irq_desc *desc) void it8152_irq_demux(struct irq_desc *desc)
{ {
int bits_pd, bits_lp, bits_ld; int bits_pd, bits_lp, bits_ld;
int i; int i;
......
arch/arm/common/locomo.c
View file @ 6afc0c26
...@@ -138,7 +138,7 @@ static struct locomo_dev_info locomo_devices[] = { ...@@ -138,7 +138,7 @@ static struct locomo_dev_info locomo_devices[] = {
}, },
}; };
static void locomo_handler(unsigned int __irq, struct irq_desc *desc) static void locomo_handler(struct irq_desc *desc)
{ {
struct locomo *lchip = irq_desc_get_chip_data(desc); struct locomo *lchip = irq_desc_get_chip_data(desc);
int req, i; int req, i;
......
arch/arm/common/sa1111.c
View file @ 6afc0c26
...@@ -196,10 +196,8 @@ static struct sa1111_dev_info sa1111_devices[] = { ...@@ -196,10 +196,8 @@ static struct sa1111_dev_info sa1111_devices[] = {
* active IRQs causes the interrupt output to pulse, the upper levels * active IRQs causes the interrupt output to pulse, the upper levels
* will call us again if there are more interrupts to process. * will call us again if there are more interrupts to process.
*/ */
static void static void sa1111_irq_handler(struct irq_desc *desc)
sa1111_irq_handler(unsigned int __irq, struct irq_desc *desc)
{ {
unsigned int irq = irq_desc_get_irq(desc);
unsigned int stat0, stat1, i; unsigned int stat0, stat1, i;
struct sa1111 *sachip = irq_desc_get_handler_data(desc); struct sa1111 *sachip = irq_desc_get_handler_data(desc);
void __iomem *mapbase = sachip->base + SA1111_INTC; void __iomem *mapbase = sachip->base + SA1111_INTC;
...@@ -214,7 +212,7 @@ sa1111_irq_handler(unsigned int __irq, struct irq_desc *desc) ...@@ -214,7 +212,7 @@ sa1111_irq_handler(unsigned int __irq, struct irq_desc *desc)
sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1); sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
if (stat0 == 0 && stat1 == 0) { if (stat0 == 0 && stat1 == 0) {
do_bad_IRQ(irq, desc); do_bad_IRQ(desc);
return; return;
} }
......
arch/arm/configs/omap2plus_defconfig
View file @ 6afc0c26
...@@ -240,7 +240,8 @@ CONFIG_SSI_PROTOCOL=m ...@@ -240,7 +240,8 @@ CONFIG_SSI_PROTOCOL=m
CONFIG_PINCTRL_SINGLE=y CONFIG_PINCTRL_SINGLE=y
CONFIG_DEBUG_GPIO=y CONFIG_DEBUG_GPIO=y
CONFIG_GPIO_SYSFS=y CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_PCF857X=m CONFIG_GPIO_PCA953X=m
CONFIG_GPIO_PCF857X=y
CONFIG_GPIO_TWL4030=y CONFIG_GPIO_TWL4030=y
CONFIG_GPIO_PALMAS=y CONFIG_GPIO_PALMAS=y
CONFIG_W1=m CONFIG_W1=m
...@@ -350,6 +351,8 @@ CONFIG_USB_MUSB_HDRC=m ...@@ -350,6 +351,8 @@ CONFIG_USB_MUSB_HDRC=m
CONFIG_USB_MUSB_OMAP2PLUS=m CONFIG_USB_MUSB_OMAP2PLUS=m
CONFIG_USB_MUSB_AM35X=m CONFIG_USB_MUSB_AM35X=m
CONFIG_USB_MUSB_DSPS=m CONFIG_USB_MUSB_DSPS=m
CONFIG_USB_INVENTRA_DMA=y
CONFIG_USB_TI_CPPI41_DMA=y
CONFIG_USB_DWC3=m CONFIG_USB_DWC3=m
CONFIG_USB_TEST=m CONFIG_USB_TEST=m
CONFIG_AM335X_PHY_USB=y CONFIG_AM335X_PHY_USB=y
......
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