Commit 42b2aa86 authored by Justin P. Mattock's avatar Justin P. Mattock Committed by Jiri Kosina
Browse files

treewide: Fix typos in various parts of the kernel, and fix some comments.


The below patch fixes some typos in various parts of the kernel, as well as fixes some comments.
Please let me know if I missed anything, and I will try to get it changed and resent.
Signed-off-by: default avatarJustin P. Mattock <justinmattock@gmail.com>
Acked-by: default avatarRandy Dunlap <rdunlap@xenotime.net>
Signed-off-by: default avatarJiri Kosina <jkosina@suse.cz>
parent a13b0327
......@@ -2,7 +2,7 @@
* arch/arm/plat-omap/include/mach/serial.h
*
* Copyright (C) 2009 Texas Instruments
* Addded OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
* Added OMAP4 support- Santosh Shilimkar <santosh.shilimkar@ti.com>
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
......
......@@ -394,7 +394,7 @@ __do_out_asm(_rec_outl, "stwbrx")
#endif /* CONFIG_PPC32 */
/* The "__do_*" operations below provide the actual "base" implementation
* for each of the defined acccessor. Some of them use the out_* functions
* for each of the defined accessors. Some of them use the out_* functions
* directly, some of them still use EEH, though we might change that in the
* future. Those macros below provide the necessary argument swapping and
* handling of the IO base for PIO.
......
......@@ -51,7 +51,7 @@
#define KL_GPIO_SOUND_POWER (KEYLARGO_GPIO_0+0x05)
/* Hrm... this one is only to be used on Pismo. It seeem to also
/* Hrm... this one is only to be used on Pismo. It seems to also
* control the timebase enable on other machines. Still to be
* experimented... --BenH.
*/
......
......@@ -521,7 +521,7 @@ static int of_get_assoc_arrays(struct device_node *memory,
aa->n_arrays = *prop++;
aa->array_sz = *prop++;
/* Now that we know the number of arrrays and size of each array,
/* Now that we know the number of arrays and size of each array,
* revalidate the size of the property read in.
*/
if (len < (aa->n_arrays * aa->array_sz + 2) * sizeof(unsigned int))
......
......@@ -840,7 +840,7 @@ static void tsb_sync(void *info)
struct trap_per_cpu *tp = &trap_block[raw_smp_processor_id()];
struct mm_struct *mm = info;
/* It is not valid to test "currrent->active_mm == mm" here.
/* It is not valid to test "current->active_mm == mm" here.
*
* The value of "current" is not changed atomically with
* switch_mm(). But that's OK, we just need to check the
......
......@@ -356,7 +356,7 @@ ACPI_EXPORT_SYMBOL(acpi_read_bit_register)
*
* PARAMETERS: register_id - ID of ACPI Bit Register to access
* Value - Value to write to the register, in bit
* position zero. The bit is automaticallly
* position zero. The bit is automatically
* shifted to the correct position.
*
* RETURN: Status
......
......@@ -613,7 +613,7 @@ static void frontend_changed(struct xenbus_device *dev,
case XenbusStateConnected:
/*
* Ensure we connect even when two watches fire in
* close successsion and we miss the intermediate value
* close succession and we miss the intermediate value
* of frontend_state.
*/
if (dev->state == XenbusStateConnected)
......
......@@ -560,7 +560,7 @@ static enum si_sm_result bt_event(struct si_sm_data *bt, long time)
BT_CONTROL(BT_H_BUSY); /* set */
/*
* Uncached, ordered writes should just proceeed serially but
* Uncached, ordered writes should just proceed serially but
* some BMCs don't clear B2H_ATN with one hit. Fast-path a
* workaround without too much penalty to the general case.
*/
......
......@@ -142,7 +142,7 @@
/*
* The ibm,sdram-4xx-ddr2 Device Control Registers (DCRs) are
* indirectly acccessed and have a base and length defined by the
* indirectly accessed and have a base and length defined by the
* device tree. The base can be anything; however, we expect the
* length to be precisely two registers, the first for the address
* window and the second for the data window.
......
......@@ -1550,7 +1550,7 @@ static int zoran_enum_fmt(struct zoran *zr, struct v4l2_fmtdesc *fmt, int flag)
if (zoran_formats[i].flags & flag && num++ == fmt->index) {
strncpy(fmt->description, zoran_formats[i].name,
sizeof(fmt->description) - 1);
/* fmt struct pre-zeroed, so adding '\0' not neeed */
/* fmt struct pre-zeroed, so adding '\0' not needed */
fmt->pixelformat = zoran_formats[i].fourcc;
if (zoran_formats[i].flags & ZORAN_FORMAT_COMPRESSED)
fmt->flags |= V4L2_FMT_FLAG_COMPRESSED;
......
......@@ -857,7 +857,7 @@ typedef struct _EVENT_DATA_SAS_DISCOVERY
#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK (0xFFFF0000)
#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT (16)
/* SAS Discovery Errror Event data */
/* SAS Discovery Error Event data */
typedef struct _EVENT_DATA_DISCOVERY_ERROR
{
......
......@@ -1664,7 +1664,7 @@ static int nsc_ircc_dma_xmit_complete(struct nsc_ircc_cb *self)
switch_bank(iobase, BANK0);
outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR);
/* Check for underrrun! */
/* Check for underrun! */
if (inb(iobase+ASCR) & ASCR_TXUR) {
self->netdev->stats.tx_errors++;
self->netdev->stats.tx_fifo_errors++;
......
......@@ -942,14 +942,14 @@ static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self)
iobase = self->io.fir_base;
/* Disable DMA */
// DisableDmaChannel(self->io.dma);
/* Check for underrrun! */
/* Check for underrun! */
/* Clear bit, by writing 1 into it */
Tx_status = GetTXStatus(iobase);
if (Tx_status & 0x08) {
self->netdev->stats.tx_errors++;
self->netdev->stats.tx_fifo_errors++;
hwreset(self);
// how to clear underrrun ?
/* how to clear underrun? */
} else {
self->netdev->stats.tx_packets++;
ResetChip(iobase, 3);
......
......@@ -677,7 +677,7 @@ static void w83977af_dma_xmit_complete(struct w83977af_ir *self)
switch_bank(iobase, SET0);
outb(inb(iobase+HCR) & ~HCR_EN_DMA, iobase+HCR);
/* Check for underrrun! */
/* Check for underrun! */
if (inb(iobase+AUDR) & AUDR_UNDR) {
IRDA_DEBUG(0, "%s(), Transmit underrun!\n", __func__ );
......
......@@ -75,7 +75,7 @@
* device is up and running or shutdown (through ifconfig up /
* down). Bus-generic only.
*
* - control ops: control.c - implements various commmands for
* - control ops: control.c - implements various commands for
* controlling the device. bus-generic only.
*
* - device model glue: driver.c - implements helpers for the
......
......@@ -466,8 +466,8 @@ void rtl92de_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
bool int_migration = *(bool *) (val);
if (int_migration) {
/* Set interrrupt migration timer and
* corresponging Tx/Rx counter.
/* Set interrupt migration timer and
* corresponding Tx/Rx counter.
* timer 25ns*0xfa0=100us for 0xf packets.
* 0x306:Rx, 0x307:Tx */
rtl_write_dword(rtlpriv, REG_INT_MIG, 0xfe000fa0);
......
......@@ -397,7 +397,7 @@ static void __exit parport_mfc3_exit(void)
MODULE_AUTHOR("Joerg Dorchain <joerg@dorchain.net>");
MODULE_DESCRIPTION("Parport Driver for Multiface 3 expansion cards Paralllel Port");
MODULE_DESCRIPTION("Parport Driver for Multiface 3 expansion cards Parallel Port");
MODULE_SUPPORTED_DEVICE("Multiface 3 Parallel Port");
MODULE_LICENSE("GPL");
......
/*
* Aic7xxx SCSI host adapter firmware asssembler
* Aic7xxx SCSI host adapter firmware assembler
*
* Copyright (c) 1997, 1998, 2000, 2001 Justin T. Gibbs.
* Copyright (c) 2001, 2002 Adaptec Inc.
......
......@@ -4494,7 +4494,7 @@ ips_init_scb(ips_ha_t * ha, ips_scb_t * scb)
/* */
/* Initialize a CCB to default values */
/* */
/* ASSUMED to be callled from within a lock */
/* ASSUMED to be called from within a lock */
/* */
/****************************************************************************/
static ips_scb_t *
......
......@@ -744,7 +744,7 @@ struct dev_db_entry {
uint8_t res4[0x36]; /* 8A-BF */
uint8_t iscsi_name[0xE0]; /* C0-19F : xxzzy Make this a
* pointer to a string so we
* don't have to reserve soooo
* don't have to reserve so
* much RAM */
uint8_t link_local_ipv6_addr[0x10]; /* 1A0-1AF */
uint8_t res5[0x10]; /* 1B0-1BF */
......
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