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  17. 04 May, 2014 2 commits
  19. 03 May, 2014 2 commits
    • Michael Coppola's avatar
      Add support for Macronix MX23L3254 mask ROM · 4e7f36ec
      Michael Coppola authored 
      
Corresponding to flashrom svn r1784.
Signed-off-by: default avatarMichael Coppola <michael.n.coppola@gmail.com>
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      4e7f36ec
    • Stefan Tauner's avatar
      Add a bunch of new/tested stuff and various small changes 20 · c2eec2c9
      Stefan Tauner authored 
      
Tested mainboards:
OK:
 - abit BX6 2.0
   Reported by Stefan Tauner
 - Acer EM61SM/EM61PM (used in Acer Aspire T180)
   Reported by Benjamin Bellec
 - ADLINK Express-HR
   Reported by Obermair Thomas
 - ASUS M3N-H/HDMI
   Reported by Franc Serres
 - Attro G5G100-P
   Reported by Christoph Grenz
 - ASRock 960GM-GS3 FX
   Reported by Fuley Istvan
 - Elitegroup P6BAP-A+ (V2.2)
   Reported by Arnaldo Pirrone
 - Elitegroup GeForce7050M-M (V2.0)
   Reported by Leif Middelschulte
 - Fujitsu D3041-A1 (used in ESPRIMO P2560)
   Reported by Daggi Duck
 - GIGABYTE GA-8S648
   Reported by TeslaBIOS
 - GIGABYTE GA-970A-D3P (rev. 1.0)
   Reported by Jean-Francois Pirus
 - GIGABYTE GA-B85M-D3H
   Reported by Mladen Milinković
 - GIGABYTE GA-X79-UD3
   Reported by Jeff O'Neil
 - GIGABYTE GA-X79-UP4 (rev. 1.0)
   Reported by George Spelvin
 - GIGABYTE GA-Z68MA-D2H-B3 (rev. 1.3)
   Reported by Vangelis Skarmoutsos
 - GIGABYTE GA-Z87-HD3
   Reported by virii5
 - Lenovo Tilapia CRB
   Reported by jenkins56 on IRC
 - MSI GT60-2OD (notebook, only with layout patches)
   Reported by Vasiliy Vylegzhanin
 - MSI MS-6704 (845PE Max2 PCB 1.0) (Pure Version w/o raid)
   Reported by professorll
 - MSI MS-7399 1.1 (used in Acer Aspire M5640/M3640)
   Reported by Koen Rousseau
 - MSI MS-7125 (K8N Neo4(-F/FI/FX))
   We had a board enable for that one for years, but it was not (and still is not)
   completely clear which boards are covered.
 - MSI MS-7522 (MSI X58 Pro-E)
   Reported by Gianluigi Tiesi
 - PCWARE APM80-D3
   Reported by César Augusto Jakoby
 - Pegatron IPP7A-CP
   Reported by Илья Шипко
 - Supermicro H8QME-2
   Reported by Greg Tippitt
 - Supermicro X7SPA-H
   Reported by Kyle Bentley
 - Supermicro X7SPE-HF-D525
   Reported by Micah Anderson
 - Supermicro X8DTE
   Reported by Mark Nipper
 - Supermicro X8SIL-F
   Reported by Peter Samuelson
 - ZOTAC IONITX-A (-E) version
   Reported by Maciej Wroniecki
NOT OK:
 - Supermicro X10SLM-F
   Reported by Micah Anderson

Flash chips:
 - Atmel AT29C020 to PREW (+PREW)
   It was marked like that in the past, but I could not find the reason why the
   test bits were reset. Urja Rannikko tested it again and it still works.
 - Eon EN25F10 to PREW (+PREW)
   Reported by Stolmár Tamás
 - Eon EN25QH64 to PR (+PR)
   Reported by Vladimir 'φ-coder' Serbinenko
 - GigaDevice GD25Q32(B) to PREW (+PREW)
   Reported by mrnuke
 - Macronix MX25L512(E)/MX25V512(C) to PREW (+PREW)
   Reported by Jamie Nichol
 - Macronix MX25L2005(C) to PREW (+PREW)
   Reported by Давыдов Дмитрий
 - Micron/Numonyx/ST N25Q064..1E to PREW (+PREW)
   Reported by Paolo Zambotti
 - Pmc Pm25LD010(C) to PREW (+PREW)
   Reported by Vasile Ceteras
 - Micron/Numonyx/ST M25P16 to PREW (+EW)
   Reported by raven
 - Micron/Numonyx/ST M25PX64 to PREW (+W)
   Reported by Zaolin
 - SST SST25VF020B to PREW (+PREW)
   Reported by Michaël Zweers
 - SST SST49LF040 to PREW (+W)
   Reported by Oskar Enoksson
 - Add support for MX25L3273E (evil twin of MX25L3205 et al.)
   Also, add MX25L1673 and MX25L6473E to the names of their twins and
   add a note about MX25L8073E.
 - Winbond W25X32 to PREW (+REW)
   Reported by The Raven
 - Winbond W29C010 etc. to PREW (+W)
   Reported by san

Chipsets tested OK:
 - Intel NM70 (8086:1e5f)
   Reported by mrnuke
 - Intel C204 (8086:1c54)
   Reported by Vasiliy Vylegzhanin
 - Intel QM67 (8086:1c4f)
   Reported by Obermair Thomas
 - Intel HM77 (8086:1e57)
   Reported by Vasiliy Vylegzhanin
 - Intel B85 (8086:8c50)
   Reported by Mladen Milinković
 - Intel HM87 (8086:8c4b)
   Reported by Vasiliy Vylegzhanin
 - Intel Z87 (8086:8c44)
   Reported by virii5
 - NVIDIA MCP51 (10de:0261)
   Reported by Marcin Kościelnicki
 - SiS 648 (1039:0648)
   Reported by TeslaBIOS

Miscellaneous:
 - Mark ARM-USB-TINY-H as tested in ft2232_spi (reported by _nanodev_).
 - getrevision.sh: Ignore failing date calls.
 - getrevision.sh: Fix -u and -l for older git versions which require = for the
   git log grep parameter.
 - Corrected K8T Neo2-F entries due to a report from Stelios Tsampas.
 - Add "-p internal" to output that requests users to send flashrom -V logs.
 - Add Macbook2,1, Thinkpad X230, EasyNote LM85 to laptop whitelist.
 - Tiny other stuff.

Corresponding to flashrom svn r1783.
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      c2eec2c9
  21. 19 Oct, 2013 1 commit
  23. 12 Sep, 2013 1 commit
  25. 27 Aug, 2013 1 commit
  27. 25 Aug, 2013 1 commit
  29. 25 Jul, 2013 1 commit
  31. 28 Jun, 2013 11 commits
  33. 20 Jun, 2013 1 commit
    • Stefan Tauner's avatar
      Fix unlocking function for most Atmel AT2[56]D* chips · cecb2c56
      Stefan Tauner authored 
      
I broke unlocking them correctly in r1635 while refactoring (NB: the
commit log including the overly selfconfident statement about the
"bug in spi_disable_blockprotect_at25df()").

Affected chips have per sector protection bits and the write protection bits
in the status register do indicate if none, some or all sectors are protected.
It is possible to globally (un)lock all sectors at once but in a way that was
not anticipated when refactoring the spi25 unlocking functions into
spi_disable_blockprotect_generic(). To globally unprotect not only the
protection bits (2 and 3) have 0 to be written to them but also bits 4 and 5
which normally would not be touched by spi_disable_blockprotect_generic().
Some of the chips also support a permanent lockdown with fuses which we
do not handle yet.

To fix this without copying the whole method I introduce another mask
parameter to spi_disable_blockprotect_generic() namely unprotect_mask.
See verbose comments inline for details.

Also, prettyprint the status register after trying to disable the block
protection fails.

Corresponding to flashrom svn r1679.
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: default avatarChi Zhang <zhangchi866@gmail.com>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      cecb2c56
  35. 09 Jun, 2013 1 commit
  37. 19 Apr, 2013 2 commits
  39. 16 Mar, 2013 1 commit
    • Stefan Tauner's avatar
      Fix evil twins of Macronix MX25L1605, MX25L3205, MX25L6405 · 226037da
      Stefan Tauner authored 
      Similarly to the patch in r1647 this one updates the chips identified as above
with references to and data about their respective twins. Unlike previously this
one deals with the more evil details.

Helge Wagner from GE discovered some problems with chips sharing IDs
and proposed a patch to tackle (some of) them, see:
http://patchwork.coreboot.org/patch/3709/
That patch was bitrotting in our mailboxes for a long time and it is still not
ready for merge, but we increasingly get reports about problems (e.g.
http://paste.flashrom.org/view.php?id=1525

) regarding these chips and
hence must act to ensure users' safety.

This patch splits the chip definitions of evil twins into separate ones which
correctly declare the respective attributes (the main problems are the erase
block sizes for the 0x20 opcode and hence my changes combine different
chips with partly different attributes apart from their names as long as the
erasers layout it the same). This forces the user to select the (right) chip
definition with the -c/--chip parameter and hence will break a number of
previously perfectly working environments.

0x2015 is used by and split to
 - MX25L1605 (64kB sectors in 0x20 erases)
 - MX25L1605A/MX25L1606E (4kB in 0x20 erases and an additional 0x52 opcode with 64kB blocks)
 - MX25L1605D/MX25L1608D (4k sectors in 0x20 erases)

0x2016 is used by and split to
 - MX25L3205/MX25L3205A (64kB 0x20)
 - MX25L3205D/MX25L3208D (4kB 0x20)
 - MX25L3206E (4k 0x20, 64k 0x52)

0x2017 is used by and split to
 - MX25L6405/MX25L6405D (64k 0x20)
 - MX25L6406E/MX25L6436E (4k 0x20)
 - MX25L6445E (4k 0x20, 64k 0x52)

Bonus: add some minor details to MX25L1635D, MX25L1635E, MX25L3235D,
MX25L12805D.

Tested with MX25L3206E, MX25L64036E.

Corresponding to flashrom svn r1657.
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      226037da
  41. 04 Mar, 2013 1 commit
  43. 22 Feb, 2013 1 commit
  45. 02 Feb, 2013 1 commit
  47. 01 Jan, 2013 1 commit
  49. 29 Dec, 2012 2 commits
    • Stefan Tauner's avatar
      Add support for Atmel's AT25F series of SPI flash chips · 57794ac1
      Stefan Tauner authored 
      
This adds support for the following chips:
 - AT25F512, AT25F512A, AT25F512B
 - AT25F1024, AT25F1024A
 - AT25F2048
 - AT25F4096

Besides the definitions of the the chips in flashchips.c this includes
- a dedicated probing method (probe_spi_at25f)
- pretty printing methods (spi_prettyprint_status_register_at25f*), and
- unlocking methods (spi_disable_blockprotect_at25f*)

Corresponding to flashrom svn r1637.
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      57794ac1
    • Stefan Tauner's avatar
      Add support for Intel S33 series flash chips · 54aaa4ae
      Stefan Tauner authored 
      
This includes:
Bottom boot block:
* 16Mb/2MB:
  QB25F160S33B8, QB25F016S33B8, QH25F160S33B8, QH25F016S33B8
* 32Mb/4MB:
  QB25F320S33B8, QH25F320S33B8
* 64Mb/8MB:
  QB25F640S33B8, QH25F640S33B8

Top boot block:
* 16Mb/2MB:
  QB25F160S33T8, QB25F016S33T8, QH25F160S33T8, QH25F016S33T8
* 32Mb/4MB:
  QB25F320S33T8, QH25F320S33T8
* 64Mb/8MB:
  QB25F640S33T8, QH25F640S33T8

At least some seem to be marketed by other vendors (too?) but also with
Intel's vendor ID.

Besides a 0xC7 chip erase and a 0xD8 uniform 64kB block erase they
support also erasing the top/bottom 8 8kB blocks with opcode 0x40.
But since this command fails for all addresses outside those ranges,
it is not easily implemented with flashrom's current code base and
hence left out.

Corresponding to flashrom svn r1636.
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      54aaa4ae
  51. 28 Oct, 2012 1 commit

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