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  1. 12 Jul, 2009 1 commit
  3. 11 Jul, 2009 2 commits
  5. 10 Jul, 2009 1 commit
    • Carl-Daniel Hailfinger's avatar
      Add SPI multicommand infrastructure · d0478299
      Carl-Daniel Hailfinger authored 
      
Some SPI opcodes need to be sent in direct succession after each other
without any chip deselect happening in between. A prominent example is
WREN (Write Enable) directly before PP (Page Program). Intel calls the
first opcode in such a row "preopcode".

Right now, we ignore the direct succession requirement completely and it
works pretty well because most onboard SPI masters have a timing or
heuristics which make the problem disappear.
The FT2232 SPI flasher is different. Since it is an external flasher,
timing is very different to what we can expect from onboard flashers and
this leads to failure at slow speeds.

This patch allows any function to submit multiple SPI commands in a
stream to any flasher. Support in the individual flashers isn't
implemented yet, so there is one generic function which passes the each
command in the stream one-by-one to the command functions of the
selected SPI flash driver.
Tested-by: default avatarJakob Bornecrantz <wallbraker@gmail.com>

Corresponding to flashrom svn r645.
Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: default avatarJakob Bornecrantz <wallbraker@gmail.com>
      d0478299
  7. 24 Jun, 2009 1 commit
  9. 16 Jun, 2009 2 commits
  11. 15 Jun, 2009 1 commit
  13. 13 Jun, 2009 1 commit
  15. 12 Jun, 2009 1 commit
  17. 05 Jun, 2009 1 commit
  19. 31 May, 2009 1 commit
    • Carl-Daniel Hailfinger's avatar
      Add bus type annotation to struct flashchips · 1dfe0ff1
      Carl-Daniel Hailfinger authored 
      
Right now, the annotation only differentiates between SPI and non-SPI.
Anyone who knows more about a specific flash chip should feel free to
update it.

The existing flashbus variable was abused to denote the SPI controller
type. Use an aptly named variable for that purpose.

Once this patch is merged, the chipset/programmer init functions can set
supported flash chip types and flashrom can automatically select only
matching probe/read/erase/write functions. A side benefit of that will
be the elimination of the Winbond W29EE011 vs. AMIC A49LF040A conflict.

Corresponding to flashrom svn r556.
Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: default avatarUwe Hermann <uwe@hermann-uwe.de>
      1dfe0ff1
  21. 27 May, 2009 1 commit
  23. 16 May, 2009 1 commit
  25. 15 May, 2009 1 commit
  27. 14 May, 2009 1 commit
  29. 13 May, 2009 2 commits
    • Carl-Daniel Hailfinger's avatar
      Generic status register prettyprinting for SST25* · 5100a8a9
      Carl-Daniel Hailfinger authored 
      
Even if we don't tell the user about the areas the block locking bits
correspond to, printing a detailed list of which lock bits are set is a
definite improvement.

Corresponding to flashrom svn r505.
Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Sample output:
[...]
Probing for SST SST25VF032B, 4096 KB: RDID returned bf 25 4a.
probe_spi_rdid_generic: id1 0xbf, id2 0x254a
Chip status register is 1c
Chip status register: Block Protect Write Disable (BPL) is not set
Chip status register: Auto Address Increment Programming (AAI) is not
set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is set
Chip status register: Bit 3 / Block Protect 1 (BP1) is set
Chip status register: Bit 2 / Block Protect 0 (BP0) is set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found chip "SST SST25VF032B" (4096 KB) at physical address 0xffc00000.
Acked-by: default avatarCristi Magherusan <cristi.magherusan@net.utcluj.ro>
      5100a8a9
    • Carl-Daniel Hailfinger's avatar
      There are various reasons why a SPI command can fail · 3e9dbea1
      Carl-Daniel Hailfinger authored 
      
Among others, I have seen the following problems: - The SPI opcode is
not supported by the controller. ICH-style controllers exhibit this if
SPI config is locked down. - The address in in a prohibited area. This
can happen on ICH for any access (BBAR) and for writes in chipset write
protected areas. - There is no SPI controller.

Introduce separate error codes for unsupported opcode and prohibited
address.

Add the ability to adjust REMS and RES addresses to the minium supported
read address with the help of spi_get_valid_read_addr(). That function
needs to call SPI controller specific functions like reading BBAR on
ICH.

Corresponding to flashrom svn r500.
Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: default avatarUwe Hermann <uwe@hermann-uwe.de>
      3e9dbea1
  31. 09 May, 2009 3 commits
  33. 06 May, 2009 1 commit
  35. 15 Apr, 2009 1 commit
  37. 26 Jan, 2009 3 commits
  39. 25 Jan, 2009 1 commit
  41. 28 Nov, 2008 2 commits
  43. 27 Nov, 2008 1 commit
    • Carl-Daniel Hailfinger's avatar
      Try RES even if RDID fails · 92a54ca0
      Carl-Daniel Hailfinger authored 
      
The existing check in probe_spi_res() was right for SPI controllers
which support all commands, but may not exist. For controllers which
support only a subset of commands, it will fail in unexpected ways. Even
if a command is supported by the controller, it may be unavailable if
the controller is locked down.

The new logic checks if RDID could be issued and its return values
made sense (not 0xff 0xff 0xff). In that case, RES probing is not
performed. Otherwise, we try RES. There is one drawback: If RDID
returned unexpected values, we don't issue a RES probe. However, in that
case we should try to match RDID anyway.

Corresponding to flashrom svn r348 and coreboot v2 svn r3774.
Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: default avatarFENG yu ning <fengyuning1984@gmail.com>
      92a54ca0
  45. 18 Nov, 2008 1 commit
    • Carl-Daniel Hailfinger's avatar
      Check for failed SPI command execution · 598ec58e
      Carl-Daniel Hailfinger authored 
      
Although SPI itself does not have a mechanism to signal command failure,
the SPI host may be unable to send a given command over the wire due
to security or hardware limitations. The current code ignores these
mechanisms completely and simply assumes almost every command succeeds.
Complain if SPI command execution fails.

Since locked down Intel chipsets (like the one we had problems with
earlier) only allow a small subset of commands, find the common subset
of commands between the chipset and the ROM in the chip erase case. That
is accomplished by the new spi_chip_erase_60_c7() which can be used for
chips supporting both 0x60 and 0xc7 chip erase commands.

Both parts of the patch address problems seen in the real world. The
increased verbosity for the error case will help us diagnose and address
problems better.

Corresponding to flashrom svn r345 and coreboot v2 svn r3757.
Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Otherwise: Acked-by: Stefan Reinauer <stepan@coresystems.de>
      598ec58e
  47. 03 Nov, 2008 1 commit
  49. 29 Oct, 2008 1 commit
  51. 18 Oct, 2008 1 commit
  53. 07 Jul, 2008 1 commit
    • Peter Stuge's avatar
      Trivial SPI cleanups · f83221b6
      Peter Stuge authored 
      
While writing a new SPI driver I fixed some things in the SPI code:
All calls to spi_command() had unneccessary #define duplications, and in some
cases the read count define could theoretically become harmful because NULL was
passed for the read buffer. Avoid a crash, should someone change the #defines.

I also noticed that the only caller of spi_page_program() was the it87 driver,
and spi_page_program() could only call back into the it87 driver. Removed the
function for easier-to-follow code and made it8716f_spi_page_program() static.
The ichspi driver's static page functions are already static.

Corresponding to flashrom svn r302 and coreboot v2 svn r3418.
Signed-off-by: default avatarPeter Stuge <peter@stuge.se>
Acked-by: default avatarPeter Stuge <peter@stuge.se>
      f83221b6
  55. 30 Jun, 2008 3 commits
  57. 27 Jun, 2008 1 commit
  59. 24 Jun, 2008 1 commit
    • Peter Stuge's avatar
      Slight restructure of SPI probe_ functions · da4e5f36
      Peter Stuge authored 
      
Preparation for a probe optimization patch. This patch does not change any
functionality. spi_probe_rdid was tested to still work on my M57SLI rev 2.

The idea is to have error checks return error immediately when something
fails, rather than having code inside an if block where the condition
tests for success.

This means: Less indentation, more clear what the code is checking.

Corresponding to flashrom svn r272 and coreboot v2 svn r3386.
Signed-off-by: default avatarPeter Stuge <peter@stuge.se>
Acked-by: default avatarWard Vandewege <ward@gnu.org>
      da4e5f36

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