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Kestrel Collaboration
Kestrel LiteX
migen
Commits
c2ea27d5
Commit
c2ea27d5
authored
7 years ago
by
Robert Jordens
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vivado: (fix) copy async reg to driving cells
parent
959f9cbc
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migen/build/xilinx/vivado.py
migen/build/xilinx/vivado.py
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migen/build/xilinx/vivado.py
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c2ea27d5
...
...
@@ -160,11 +160,11 @@ class XilinxVivadoToolchain:
"set_max_delay 2 -quiet -through "
"[get_nets -hier -filter {{ars_meta==true}}]"
)
# copy async_reg from wires to
cell input
s
# copy async_reg from wires to
driving cell
s
platform
.
add_platform_command
(
"set_property -quiet ASYNC_REG 1 [get_cells -of [get_pins -of "
"[get_nets -hier -filter {{async_reg==true}}] -filter "
"{{DIRECTION==
IN
}}]]"
"{{DIRECTION==
OUT
}}]]"
)
def
build
(
self
,
platform
,
fragment
,
build_dir
=
"build"
,
build_name
=
"top"
,
...
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