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Kestrel Collaboration
Kestrel LiteX
migen
Commits
245a3b92
Commit
245a3b92
authored
7 years ago
by
Sebastien Bourdeauducq
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sayma_amc: fix more I/O voltages
parent
0f78f9f7
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migen/build/platforms/sinara/sayma_amc.py
migen/build/platforms/sinara/sayma_amc.py
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migen/build/platforms/sinara/sayma_amc.py
View file @
245a3b92
...
...
@@ -3,12 +3,12 @@ from migen.build.xilinx import XilinxPlatform
_io
=
[
(
"user_led"
,
0
,
Pins
(
"AG9"
),
IOStandard
(
"LVCMOS
18
"
)),
# sfp1_led1
(
"user_led"
,
1
,
Pins
(
"AJ10"
),
IOStandard
(
"LVCMOS
18
"
)),
# sfp1_led2
(
"user_led"
,
2
,
Pins
(
"AJ13"
),
IOStandard
(
"LVCMOS
18
"
)),
# sfp2_led1
(
"user_led"
,
3
,
Pins
(
"AE13"
),
IOStandard
(
"LVCMOS
18
"
)),
# sfp2_led2
(
"user_led"
,
0
,
Pins
(
"AG9"
),
IOStandard
(
"LVCMOS
33
"
)),
# sfp1_led1
(
"user_led"
,
1
,
Pins
(
"AJ10"
),
IOStandard
(
"LVCMOS
33
"
)),
# sfp1_led2
(
"user_led"
,
2
,
Pins
(
"AJ13"
),
IOStandard
(
"LVCMOS
33
"
)),
# sfp2_led1
(
"user_led"
,
3
,
Pins
(
"AE13"
),
IOStandard
(
"LVCMOS
33
"
)),
# sfp2_led2
(
"clk50"
,
0
,
Pins
(
"AF9"
),
IOStandard
(
"LVCMOS
18
"
)),
(
"clk50"
,
0
,
Pins
(
"AF9"
),
IOStandard
(
"LVCMOS
33
"
)),
(
"serial"
,
0
,
Subsignal
(
"tx"
,
Pins
(
"AK8"
)),
...
...
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