Reconfigure Kestrel on-module Flash controller to high speed mode instead of...

Reconfigure Kestrel on-module Flash controller to high speed mode instead of external BMC Flash controller

This fixes slow boot from Flash with the current Kestrel Flash mapping

litex/soc/software/bios/boot.c

@@ -593,13 +593,13 @@ static int copy_image_from_flash_to_ram(unsigned int flash_address, unsigned lon
 	// KESTREL SPECIFIC
 	// Set SPI clock cycle divider to 1
 	uint32_t dword;
-	dword = read_tercel_register(BMCSPIFLASHCFG_BASE, TERCEL_SPI_REG_SYS_PHY_CFG1);
+	dword = read_tercel_register(FPGASPIFLASHCFG_BASE, TERCEL_SPI_REG_SYS_PHY_CFG1);
 	dword &= ~(TERCEL_SPI_PHY_CLOCK_DIVISOR_MASK << TERCEL_SPI_PHY_CLOCK_DIVISOR_SHIFT);
 	dword |= ((1 & TERCEL_SPI_PHY_CLOCK_DIVISOR_MASK) << TERCEL_SPI_PHY_CLOCK_DIVISOR_SHIFT);
-	write_tercel_register(BMCSPIFLASHCFG_BASE, TERCEL_SPI_REG_SYS_PHY_CFG1, dword);
+	write_tercel_register(FPGASPIFLASHCFG_BASE, TERCEL_SPI_REG_SYS_PHY_CFG1, dword);
 	// Enable read merging
-	write_tercel_register(BMCSPIFLASHCFG_BASE, TERCEL_SPI_REG_SYS_FLASH_CFG5,
-				read_tercel_register(BMCSPIFLASHCFG_BASE, TERCEL_SPI_REG_SYS_FLASH_CFG5) |
+	write_tercel_register(FPGASPIFLASHCFG_BASE, TERCEL_SPI_REG_SYS_FLASH_CFG5,
+				read_tercel_register(FPGASPIFLASHCFG_BASE, TERCEL_SPI_REG_SYS_FLASH_CFG5) |
 				(TERCEL_SPI_FLASH_EN_MULTCYC_READ_MASK << TERCEL_SPI_FLASH_EN_MULTCYC_READ_SHIFT));
 
 	image_length = length = check_image_in_flash(flash_address, 0);