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K Kestrel LiteX
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  • Merge requests 3
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  • Kestrel Collaboration
  • Kestrel LiteX
  • Merge requests

  • Open 3
  • Merged 11
  • Closed 1
  • All 15
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  • Priority Created date Last updated Milestone due date Popularity Label priority
  • Update comments in PPC timer files
    litex!4 · created 4 years ago by Raptor Engineering Development Team
    • MERGED
    • 0
    updated 4 years ago
  • [RFC] Add alternate timer mechanism to LiteX BIOS on POWER systems
    litex!3 · created 4 years ago by Raptor Engineering Development Team
    • MERGED
    • 45
    updated 4 years ago
  • Initial refactor of kestrel code - will be used for versa adapter board changes.
    litex-boards!7 · created 4 years ago by Evan Lojewski
    • MERGED
    • 6
    updated 4 years ago
  • Expand the reg map to include space for 64-bit time stamps (not implemented)
    pythondata-peripheral-simplertc!1 · created 4 years ago by Jonathan Currier
    • MERGED
    • 3
    updated 4 years ago
  • Allow the build to set the reset address, and default it to 0x40000000
    litex!2 · created 4 years ago by Jonathan Currier
    • 1
    updated 4 years ago
  • Bring Out the Reset address so it can be synth-time configurable
    pythondata-cpu-microwatt!2 · created 4 years ago by Jonathan Currier
    • 0
    updated 4 years ago
  • dormito/simple rtc 64 bit time
    litex-boards!6 · created 4 years ago by Jonathan Currier
    • CLOSED
    • 4
    updated 4 years ago
  • xics: Disable endianness swapping
    litex!1 · created 4 years ago by Evan Lojewski
    • MERGED
    • 0
    updated 4 years ago
  • Add Address remapping (build time).
    litex-boards!5 · created 4 years ago by Jonathan Currier
    • 0
    updated 4 years ago
  • Introduce SPR_KAIVB for interrupt vector table relocation.
    pythondata-cpu-microwatt!1 · created 4 years ago by Jonathan Currier
    • MERGED
    • 9
    updated 4 years ago
  • Drop core block down to 50MHz for improved stability
    litex-boards!4 · created 4 years ago by Jonathan Currier
    • MERGED
    • 2
    updated 4 years ago
  • kestrel: Update the l2 cache size to fully utilize bram (88% used instead of...
    litex-boards!3 · created 4 years ago by Evan Lojewski
    • MERGED
    • 0
    updated 4 years ago
  • kestrel: Initialize rom with ecpbram contents to enable updates after synthisys
    litex-boards!2 · created 4 years ago by Evan Lojewski
    • MERGED
    • 0
    updated 4 years ago
  • specials: Update mem.init files to match expectation of ecpbram
    migen!1 · created 4 years ago by Evan Lojewski
    • MERGED
    • 0
    updated 4 years ago
  • Add related documentation links for the needed IPMI/OCC commands
    litex-boards!1 · created 4 years ago by Jonathan Currier
    • MERGED
    • 1
    updated 4 years ago

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