- 06 Dec, 2019 3 commits
-
-
Florent Kermarrec authored
targets: keep attributes are no longer needed since automatically added when applying constraints to signals.
-
Florent Kermarrec authored
-
Florent Kermarrec authored
-
- 03 Dec, 2019 3 commits
-
-
Florent Kermarrec authored
-
Florent Kermarrec authored
-
Florent Kermarrec authored
-
- 25 Nov, 2019 1 commit
-
-
Sean Cross authored
The SoCCore definition used to be available under litex.soc.integration, however it was removed in https://github.com/enjoy-digital/litex/commit/626533ce9d84ba081aa320dd330f5f0d800333b0 Signed-off-by: Sean Cross <sean@xobs.io>
-
- 24 Nov, 2019 1 commit
-
-
Sean Cross authored
Fomu Hacker supports dual spi, so add a "spiflash4x" definition. The litex spi_flash module will run this flash in dual mode, because the `dq` array is only two signals wide. Signed-off-by: Sean Cross <sean@xobs.io>
-
- 23 Nov, 2019 1 commit
-
-
Sean Cross authored
This documentation can be fetched using a package such as lxsocdoc. Signed-off-by: Sean Cross <sean@xobs.io>
-
- 22 Nov, 2019 1 commit
-
-
Sean Cross authored
These pins were swapped in the definition, which made them not work so well. Signed-off-by: Sean Cross <sean@xobs.io>
-
- 16 Nov, 2019 1 commit
-
-
Florent Kermarrec authored
platforms/target: only catch ModuleNotFoundError exceptions to improve error reporting (thanks mwelling)
-
- 06 Nov, 2019 1 commit
-
-
Florent Kermarrec authored
-
- 01 Nov, 2019 1 commit
-
-
Florent Kermarrec authored
-
- 30 Oct, 2019 1 commit
-
-
Florent Kermarrec authored
-
- 29 Oct, 2019 3 commits
-
-
Gabriel Somlo authored
Sync up with Litex commit #49372852d.
-
Gabriel Somlo authored
Sync up with litex commit #201218b2c.
-
Gabriel Somlo authored
Sync up with litex commit #ae9c25b74.
-
- 13 Oct, 2019 3 commits
-
-
Florent Kermarrec authored
-
Steven Osborn authored
-
Steven Osborn authored
-
- 11 Oct, 2019 2 commits
-
-
Sean Cross authored
This connector is for the six "debug" pins on the Raspberry Pi header. Signed-off-by: Sean Cross <sean@xobs.io>
-
Sean Cross authored
The D3 and D4 pins were swapped around, leading to interesting issues. Signed-off-by: Sean Cross <sean@xobs.io>
-
- 09 Oct, 2019 1 commit
-
-
Florent Kermarrec authored
-
- 27 Sep, 2019 1 commit
-
-
Sean Cross authored
Signed-off-by: Sean Cross <sean@xobs.io>
-
- 25 Sep, 2019 2 commits
-
-
Florent Kermarrec authored
-
Florent Kermarrec authored
-
- 17 Sep, 2019 3 commits
-
-
Sean Cross authored
The heap placer is important enough that we should just make it the default. Also, add a `USBSoC` that includes the required interrupt table, as this must be specified prior to calling `__init__()`. Signed-off-by: Sean Cross <sean@xobs.io>
-
Sean Cross authored
Use the memory array to find the address for the sram bank. Signed-off-by: Sean Cross <sean@xobs.io>
-
Sean Cross authored
Allow the user to specify a CPU. Signed-off-by: Sean Cross <sean@xobs.io>
-
- 12 Sep, 2019 1 commit
-
-
Florent Kermarrec authored
-
- 11 Sep, 2019 2 commits
-
-
Florent Kermarrec authored
-
Florent Kermarrec authored
-
- 10 Sep, 2019 1 commit
-
-
Antti Lukats authored
-
- 09 Sep, 2019 1 commit
-
-
Florent Kermarrec authored
-
- 03 Sep, 2019 1 commit
-
-
Florent Kermarrec authored
-
- 02 Sep, 2019 3 commits
-
-
Florent Kermarrec authored
-
Florent Kermarrec authored
-
Sean Cross authored
This adds the Fomu target back in. The default BaseSoC supports various USB methods, and will be updated as more become available. The debug bridge may optionally be added. Signed-off-by: Sean Cross <sean@xobs.io>
-
- 01 Sep, 2019 2 commits
-
-
Florent Kermarrec authored
targets/__init__: comment targets import until we found a way to avoid litedram/liteeth dependecies for targets no using them.
-
Rohit Singh authored
-