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Timothy Pearson
litex-boards
Commits
de78b12b
Unverified
Commit
de78b12b
authored
5 years ago
by
enjoy-digital
Committed by
GitHub
5 years ago
Browse files
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Merge pull request #1 from TomKeddie/tomk_20190612_fomu_platform
Add fomu platform definitions
parents
44d01eda
c87412b0
Changes
3
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3 changed files
with
229 additions
and
0 deletions
+229
-0
litex/boards/platforms/fomu_evt.py
litex/boards/platforms/fomu_evt.py
+79
-0
litex/boards/platforms/fomu_hacker.py
litex/boards/platforms/fomu_hacker.py
+74
-0
litex/boards/platforms/fomu_pvt.py
litex/boards/platforms/fomu_pvt.py
+76
-0
No files found.
litex/boards/platforms/fomu_evt.py
0 → 100644
View file @
de78b12b
# fomu evt board from from crowd funding
# design files at https://github.com/im-tomu/fomu-hardware/tree/evt/hardware/pcb
#
from
litex.build.generic_platform
import
*
from
litex.build.lattice
import
LatticePlatform
from
litex.build.lattice.programmer
import
IceStormProgrammer
_io
=
[
(
"rgb_led_n"
,
0
,
Subsignal
(
"r"
,
Pins
(
"40"
)),
Subsignal
(
"g"
,
Pins
(
"39"
)),
Subsignal
(
"b"
,
Pins
(
"41"
)),
IOStandard
(
"LVCMOS33"
),
),
# alias blue led
(
"user_led_n"
,
0
,
Pins
(
"41"
),
IOStandard
(
"LVCMOS33"
)),
(
"user_btn_n"
,
0
,
Pins
(
"42"
),
IOStandard
(
"LVCMOS33"
)),
(
"user_btn_n"
,
1
,
Pins
(
"38"
),
IOStandard
(
"LVCMOS33"
)),
(
"serial"
,
0
,
Subsignal
(
"rx"
,
Pins
(
"21"
)),
Subsignal
(
"tx"
,
Pins
(
"13"
),
Misc
(
"PULLUP"
)),
IOStandard
(
"LVCMOS33"
)
),
(
"usb"
,
0
,
Subsignal
(
"d_p"
,
Pins
(
"34"
)),
Subsignal
(
"d_n"
,
Pins
(
"37"
)),
Subsignal
(
"pullup"
,
Pins
(
"35"
)),
Subsignal
(
"pulldown"
,
Pins
(
"36"
)),
IOStandard
(
"LVCMOS33"
)
),
(
"spiflash"
,
0
,
Subsignal
(
"cs_n"
,
Pins
(
"16"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"clk"
,
Pins
(
"15"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"miso"
,
Pins
(
"17"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"mosi"
,
Pins
(
"14"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"wp"
,
Pins
(
"18"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"hold"
,
Pins
(
"19"
),
IOStandard
(
"LVCMOS33"
)),
),
(
"spiflash4x"
,
0
,
Subsignal
(
"cs_n"
,
Pins
(
"16"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"clk"
,
Pins
(
"15"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"dq"
,
Pins
(
"14 17 19 18"
),
IOStandard
(
"LVCMOS33"
)),
),
(
"clk48"
,
0
,
Pins
(
"44"
),
IOStandard
(
"LVCMOS33"
)),
]
_connectors
=
[
(
"touch_pins"
,
"48 47 46 45"
),
(
"pmoda_n"
,
"28 27 26 23"
),
(
"pmodb_n"
,
"48 47 46 45"
),
]
class
Platform
(
LatticePlatform
):
default_clk_name
=
"clk48"
default_clk_period
=
20.833
gateware_size
=
0x20000
# FIXME: Create a "spi flash module" object in the same way we have SDRAM
spiflash_model
=
"n25q32"
spiflash_read_dummy_bits
=
8
spiflash_clock_div
=
2
spiflash_total_size
=
int
((
16
/
8
)
*
1024
*
1024
)
# 16Mbit
spiflash_page_size
=
256
spiflash_sector_size
=
0x10000
def
__init__
(
self
):
LatticePlatform
.
__init__
(
self
,
"ice40-up5k-sg48"
,
_io
,
_connectors
,
toolchain
=
"icestorm"
)
def
create_programmer
(
self
):
return
IceStormProgrammer
()
This diff is collapsed.
Click to expand it.
litex/boards/platforms/fomu_hacker.py
0 → 100644
View file @
de78b12b
# fomu hacker board
# schematic at https://github.com/im-tomu/fomu-hardware/tree/master/hacker/releases/v0.0-19-g154fecc
#
from
litex.build.generic_platform
import
*
from
litex.build.lattice
import
LatticePlatform
from
litex.build.lattice.programmer
import
IceStormProgrammer
_io
=
[
(
"rgb_led"
,
0
,
Subsignal
(
"r"
,
Pins
(
"C5"
)),
Subsignal
(
"g"
,
Pins
(
"B5"
)),
Subsignal
(
"b"
,
Pins
(
"A5"
)),
IOStandard
(
"LVCMOS33"
)
),
# alias blue led
(
"user_led_n"
,
0
,
Pins
(
"A5"
),
IOStandard
(
"LVCMOS33"
)),
(
"user_touch_n"
,
0
,
Pins
(
"F4"
),
IOStandard
(
"LVCMOS33"
)),
(
"user_touch_n"
,
1
,
Pins
(
"E5"
),
IOStandard
(
"LVCMOS33"
)),
(
"user_touch_n"
,
2
,
Pins
(
"E4"
),
IOStandard
(
"LVCMOS33"
)),
(
"user_touch_n"
,
3
,
Pins
(
"F2"
),
IOStandard
(
"LVCMOS33"
)),
(
"usb"
,
0
,
Subsignal
(
"d_p"
,
Pins
(
"A4"
)),
Subsignal
(
"d_n"
,
Pins
(
"A2"
)),
Subsignal
(
"pullup"
,
Pins
(
"D5"
)),
IOStandard
(
"LVCMOS33"
)
),
(
"clk48"
,
0
,
Pins
(
"F5"
),
IOStandard
(
"LVCMOS33"
)),
# Adesto AT25SF161 - 16-Mbit - 2 megabyte
# Supports SPI Modes 0 and 3
# Supports Dual and Quad Output Read
#
(
"spiflash"
,
0
,
Subsignal
(
"cs_n"
,
Pins
(
"C1"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"clk"
,
Pins
(
"D1"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"mosi"
,
Pins
(
"F1"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"miso"
,
Pins
(
"E1"
),
IOStandard
(
"LVCMOS33"
)),
),
]
_connectors
=
[
# Pins
# Pin 1 - F4 - Outside full square
# Pin 2 - E5
# Pin 3 - E4
# Pin 4 - F2 - Near notch on bottom
(
"touch_pins"
,
"F4 E5 E4 F2"
),
]
class
Platform
(
LatticePlatform
):
default_clk_name
=
"clk48"
default_clk_period
=
20.833
gateware_size
=
0x20000
# FIXME: Create a "spi flash module" object in the same way we have SDRAM
spiflash_model
=
"n25q32"
spiflash_read_dummy_bits
=
8
spiflash_clock_div
=
2
spiflash_total_size
=
int
((
16
/
8
)
*
1024
*
1024
)
# 16Mbit, 1megabytes
spiflash_page_size
=
256
spiflash_sector_size
=
0x10000
def
__init__
(
self
):
LatticePlatform
.
__init__
(
self
,
"ice40-up5k-uwg30"
,
_io
,
_connectors
,
toolchain
=
"icestorm"
)
def
create_programmer
(
self
):
return
IceStormProgrammer
()
This diff is collapsed.
Click to expand it.
litex/boards/platforms/fomu_pvt.py
0 → 100644
View file @
de78b12b
# fomu pvt board from crowd funding
# design files at https://github.com/im-tomu/fomu-hardware/tree/pvt/hardware/pcb
#
from
litex.build.generic_platform
import
*
from
litex.build.lattice
import
LatticePlatform
from
litex.build.lattice.programmer
import
IceStormProgrammer
_io
=
[
(
"rgb_led"
,
0
,
Subsignal
(
"r"
,
Pins
(
"C5"
)),
Subsignal
(
"g"
,
Pins
(
"B5"
)),
Subsignal
(
"b"
,
Pins
(
"A5"
)),
IOStandard
(
"LVCMOS33"
)
),
# alias blue led
(
"user_led_n"
,
0
,
Pins
(
"A5"
),
IOStandard
(
"LVCMOS33"
)),
(
"usb"
,
0
,
Subsignal
(
"d_p"
,
Pins
(
"A1"
)),
Subsignal
(
"d_n"
,
Pins
(
"A2"
)),
Subsignal
(
"pullup"
,
Pins
(
"A4"
)),
IOStandard
(
"LVCMOS33"
)
),
(
"clk48"
,
0
,
Pins
(
"F4"
),
IOStandard
(
"LVCMOS33"
)),
# Adesto AT25SF161 - 16-Mbit - 2 megabyte
# Supports SPI Modes 0 and 3
# Supports Dual and Quad Output Read
#
(
"spiflash"
,
0
,
Subsignal
(
"cs_n"
,
Pins
(
"C1"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"clk"
,
Pins
(
"D1"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"mosi"
,
Pins
(
"F1"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"miso"
,
Pins
(
"E1"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"wp"
,
Pins
(
"F2"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"hold"
,
Pins
(
"B1"
),
IOStandard
(
"LVCMOS33"
)),
),
(
"spiflash4x"
,
0
,
Subsignal
(
"cs_n"
,
Pins
(
"C1"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"clk"
,
Pins
(
"D1"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"dq"
,
Pins
(
"E1 F1 F2 B1"
),
IOStandard
(
"LVCMOS33"
)),
),
]
_connectors
=
[
# Pins
# Pin 1
# Pin 2
# Pin 3
# Pin 4
(
"touch_pins"
,
"E4 D5 E5 F5"
),
]
class
Platform
(
LatticePlatform
):
default_clk_name
=
"clk48"
default_clk_period
=
20.833
gateware_size
=
0x20000
# FIXME: Create a "spi flash module" object in the same way we have SDRAM
spiflash_model
=
"n25q32"
spiflash_read_dummy_bits
=
8
spiflash_clock_div
=
2
spiflash_total_size
=
int
((
16
/
8
)
*
1024
*
1024
)
# 16Mbit, 1megabytes
spiflash_page_size
=
256
spiflash_sector_size
=
0x10000
def
__init__
(
self
):
LatticePlatform
.
__init__
(
self
,
"ice40-up5k-uwg30"
,
_io
,
_connectors
,
toolchain
=
"icestorm"
)
def
create_programmer
(
self
):
return
IceStormProgrammer
()
This diff is collapsed.
Click to expand it.
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