Commit 19eb5708 authored by Florent Kermarrec's avatar Florent Kermarrec
Browse files

platforms: make sure all traditional platforms have a create_programmer method.

parent 84468c2a
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
from litex.build.generic_platform import * from litex.build.generic_platform import *
from litex.build.lattice import LatticePlatform from litex.build.lattice import LatticePlatform
from litex.build.lattice.programmer import OpenOCDJTAGProgrammer
# IOs ---------------------------------------------------------------------------------------------- # IOs ----------------------------------------------------------------------------------------------
...@@ -221,6 +222,9 @@ class Platform(LatticePlatform): ...@@ -221,6 +222,9 @@ class Platform(LatticePlatform):
connectors = {"6.1": _connectors_v6_1, "7.0": _connectors_v7_0}[revision] connectors = {"6.1": _connectors_v6_1, "7.0": _connectors_v7_0}[revision]
LatticePlatform.__init__(self, device, io, connectors=connectors, toolchain="trellis") LatticePlatform.__init__(self, device, io, connectors=connectors, toolchain="trellis")
def create_programmer(self):
return OpenOCDJTAGProgrammer("openocd_colorlight_5a_75b.cfg")
def do_finalize(self, fragment): def do_finalize(self, fragment):
LatticePlatform.do_finalize(self, fragment) LatticePlatform.do_finalize(self, fragment)
self.add_period_constraint(self.lookup_request("clk25", loose=True), 1e9/25e6) self.add_period_constraint(self.lookup_request("clk25", loose=True), 1e9/25e6)
...@@ -136,8 +136,7 @@ class Platform(LatticePlatform): ...@@ -136,8 +136,7 @@ class Platform(LatticePlatform):
return LatticePlatform.request(self, *args, **kwargs) return LatticePlatform.request(self, *args, **kwargs)
def create_programmer(self): def create_programmer(self):
trellis = os.environ.get("TRELLIS", "/usr/share/trellis") return OpenOCDJTAGProgrammer("openocd_evn_ecp5.cfg")
return OpenOCDJTAGProgrammer(os.path.join(trellis, "misc", "openocd", "ecp5-evn.cfg"), "bscan_spi_lfe5um5g85f.svf")
def do_finalize(self, fragment): def do_finalize(self, fragment):
LatticePlatform.do_finalize(self, fragment) LatticePlatform.do_finalize(self, fragment)
......
...@@ -3,6 +3,7 @@ ...@@ -3,6 +3,7 @@
from litex.build.generic_platform import * from litex.build.generic_platform import *
from litex.build.lattice import LatticePlatform from litex.build.lattice import LatticePlatform
from litex.build.lattice.programmer import OpenOCDJTAGProgrammer
# IOs ---------------------------------------------------------------------------------------------- # IOs ----------------------------------------------------------------------------------------------
...@@ -97,6 +98,9 @@ class Platform(LatticePlatform): ...@@ -97,6 +98,9 @@ class Platform(LatticePlatform):
def __init__(self, **kwargs): def __init__(self, **kwargs):
LatticePlatform.__init__(self, "LFE5UM5G-85F-8BG554I", _io, _connectors, **kwargs) LatticePlatform.__init__(self, "LFE5UM5G-85F-8BG554I", _io, _connectors, **kwargs)
def create_programmer(self):
return OpenOCDJTAGProgrammer("openocd_ecpix5.cfg")
def do_finalize(self, fragment): def do_finalize(self, fragment):
LatticePlatform.do_finalize(self, fragment) LatticePlatform.do_finalize(self, fragment)
self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6) self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6)
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
from litex.build.generic_platform import * from litex.build.generic_platform import *
from litex.build.xilinx import XilinxPlatform from litex.build.xilinx import XilinxPlatform
from litex.build.xilinx.programmer import FpgaProg from litex.build.xilinx.programmer import XC3SProg
# IOs ---------------------------------------------------------------------------------------------- # IOs ----------------------------------------------------------------------------------------------
...@@ -136,7 +136,7 @@ class Platform(XilinxPlatform): ...@@ -136,7 +136,7 @@ class Platform(XilinxPlatform):
XilinxPlatform.__init__(self, device+"-3-ftg256", _io, _connectors) XilinxPlatform.__init__(self, device+"-3-ftg256", _io, _connectors)
def create_programmer(self): def create_programmer(self):
return FpgaProg() return XC3SProg(cable="ftdi")
def do_finalize(self, fragment): def do_finalize(self, fragment):
XilinxPlatform.do_finalize(self, fragment) XilinxPlatform.do_finalize(self, fragment)
......
...@@ -7,7 +7,7 @@ ...@@ -7,7 +7,7 @@
from litex.build.generic_platform import * from litex.build.generic_platform import *
from litex.build.xilinx import XilinxPlatform from litex.build.xilinx import XilinxPlatform
from litex.build.openocd import OpenOCD from litex.build.xilinx.programmer import XC3SProg
# IOs ---------------------------------------------------------------------------------------------- # IOs ----------------------------------------------------------------------------------------------
...@@ -152,7 +152,7 @@ class Platform(XilinxPlatform): ...@@ -152,7 +152,7 @@ class Platform(XilinxPlatform):
self.toolchain.bitgen_opt += " -g Compress -g ConfigRate:6" self.toolchain.bitgen_opt += " -g Compress -g ConfigRate:6"
def create_programmer(self): def create_programmer(self):
return OpenOCD("openocd_xilinx_xc6.cfg", "bscan_spi_xc6slx45.bit") return XC3SProg(cable="ftdi")
def do_finalize(self, fragment): def do_finalize(self, fragment):
XilinxPlatform.do_finalize(self, fragment) XilinxPlatform.do_finalize(self, fragment)
......
...@@ -3,6 +3,7 @@ ...@@ -3,6 +3,7 @@
from litex.build.generic_platform import * from litex.build.generic_platform import *
from litex.build.lattice import LatticePlatform from litex.build.lattice import LatticePlatform
from litex.build.lattice.programmer import OpenOCDJTAGProgrammer
# IOs ---------------------------------------------------------------------------------------------- # IOs ----------------------------------------------------------------------------------------------
...@@ -220,6 +221,9 @@ class Platform(LatticePlatform): ...@@ -220,6 +221,9 @@ class Platform(LatticePlatform):
def __init__(self, **kwargs): def __init__(self, **kwargs):
LatticePlatform.__init__(self, "LFE5UM5G-85F-8BG756C", _io, _connectors, **kwargs) LatticePlatform.__init__(self, "LFE5UM5G-85F-8BG756C", _io, _connectors, **kwargs)
def create_programmer(self):
return OpenOCDJTAGProgrammer("openocd_trellisboard.cfg")
def do_finalize(self, fragment): def do_finalize(self, fragment):
LatticePlatform.do_finalize(self, fragment) LatticePlatform.do_finalize(self, fragment)
self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6) self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6)
......
...@@ -3,6 +3,7 @@ ...@@ -3,6 +3,7 @@
from litex.build.generic_platform import * from litex.build.generic_platform import *
from litex.build.lattice import LatticePlatform from litex.build.lattice import LatticePlatform
from litex.build.lattice.programmer import UJProg
# IOs ---------------------------------------------------------------------------------------------- # IOs ----------------------------------------------------------------------------------------------
...@@ -102,6 +103,9 @@ class Platform(LatticePlatform): ...@@ -102,6 +103,9 @@ class Platform(LatticePlatform):
def __init__(self, device="LFE5U-45F", **kwargs): def __init__(self, device="LFE5U-45F", **kwargs):
LatticePlatform.__init__(self, device + "-6BG381C", _io, **kwargs) LatticePlatform.__init__(self, device + "-6BG381C", _io, **kwargs)
def create_programmer(self):
return UJProg()
def do_finalize(self, fragment): def do_finalize(self, fragment):
LatticePlatform.do_finalize(self, fragment) LatticePlatform.do_finalize(self, fragment)
self.add_period_constraint(self.lookup_request("clk25", loose=True), 1e9/25e6) self.add_period_constraint(self.lookup_request("clk25", loose=True), 1e9/25e6)
...@@ -4,6 +4,7 @@ ...@@ -4,6 +4,7 @@
from litex.build.generic_platform import * from litex.build.generic_platform import *
from litex.build.lattice import LatticePlatform from litex.build.lattice import LatticePlatform
from litex.build.lattice.programmer import OpenOCDJTAGProgrammer
# IOs ---------------------------------------------------------------------------------------------- # IOs ----------------------------------------------------------------------------------------------
...@@ -223,6 +224,9 @@ class Platform(LatticePlatform): ...@@ -223,6 +224,9 @@ class Platform(LatticePlatform):
def __init__(self, **kwargs): def __init__(self, **kwargs):
LatticePlatform.__init__(self, "LFE5UM5G-45F-8BG381C", _io, _connectors, **kwargs) LatticePlatform.__init__(self, "LFE5UM5G-45F-8BG381C", _io, _connectors, **kwargs)
def create_programmer(self):
return OpenOCDJTAGProgrammer("openocd_versa_ecp5.cfg")
def do_finalize(self, fragment): def do_finalize(self, fragment):
self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6) self.add_period_constraint(self.lookup_request("clk100", loose=True), 1e9/100e6)
self.add_period_constraint(self.lookup_request("eth_clocks:rx", 0, loose=True), 1e9/125e6) self.add_period_constraint(self.lookup_request("eth_clocks:rx", 0, loose=True), 1e9/125e6)
......
interface ftdi
ftdi_vid_pid 0x0403 0x6010
ftdi_channel 0
ftdi_layout_init 0x00e8 0x60eb
reset_config none
adapter_khz 25000
jtag newtap ecp5 tap -irlen 8 -expected-id 0x41111043
interface ftdi
ftdi_vid_pid 0x0403 0x6010
ftdi_channel 0
ftdi_layout_init 0xfff8 0xfffb
reset_config none
adapter_khz 5000
jtag newtap ecp5 tap -irlen 8 -expected-id 0x81113043
interface ftdi
ftdi_vid_pid 0x0403 0x6010
ftdi_channel 0
ftdi_layout_init 0xfff8 0xfffb
reset_config none
adapter_khz 5000
jtag newtap ecp5 tap -irlen 8 -expected-id 0x81113043
interface ftdi
ftdi_vid_pid 0x0403 0x6010
ftdi_channel 0
ftdi_layout_init 0xfff8 0xfffb
reset_config none
adapter_khz 25000
jtag newtap ecp5 tap -irlen 8 -expected-id 0x81112043
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