1. 09 Aug, 2009 1 commit
  2. 23 Jul, 2009 1 commit
    • Carl-Daniel Hailfinger's avatar
      This is a workaround for a bug in SB600 and SB700 · f8555e24
      Carl-Daniel Hailfinger authored
      
      If we only send an opcode and no additional data/address, the SPI
      controller will read one byte too few from the chip. Basically, the
      last byte of the chip response is discarded and will not end up in the
      FIFO. It is unclear if the CS# line is set high too early as well. That
      hardware bug is undocumented as of now, but I'm working with AMD to add
      a detailed description of it to the errata.
      
      Add loads of additional debugging to SB600/SB700 init.
      
      Add explanatory comments for unintuitive code flow.
      
      Thanks go to Uwe for testing quite a few iterations of the patch.
      
      Kill the SB600 flash chip status register special case, which was a
      somewhat misguided workaround for that hardware erratum.
      
      Note for future added features in the SB600 SPI driver: It may be
      possible to read up to 15 bytes of command response with overlapping
      reads due to the ring buffer design of the FIFO if the command can be
      repeated without ill effects. Same for skipping up to 7 bytes between
      command and response.
      
      Corresponding to flashrom svn r661.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarStefan Reinauer <stepan@coresystems.de>
      f8555e24
  3. 28 Jun, 2009 2 commits
  4. 18 Jun, 2009 1 commit
  5. 17 Jun, 2009 1 commit
  6. 16 Jun, 2009 1 commit
  7. 15 Jun, 2009 1 commit
  8. 02 Jun, 2009 1 commit
  9. 01 Jun, 2009 1 commit
  10. 31 May, 2009 1 commit
    • Carl-Daniel Hailfinger's avatar
      Add bus type annotation to struct flashchips · 1dfe0ff1
      Carl-Daniel Hailfinger authored
      
      Right now, the annotation only differentiates between SPI and non-SPI.
      Anyone who knows more about a specific flash chip should feel free to
      update it.
      
      The existing flashbus variable was abused to denote the SPI controller
      type. Use an aptly named variable for that purpose.
      
      Once this patch is merged, the chipset/programmer init functions can set
      supported flash chip types and flashrom can automatically select only
      matching probe/read/erase/write functions. A side benefit of that will
      be the elimination of the Winbond W29EE011 vs. AMIC A49LF040A conflict.
      
      Corresponding to flashrom svn r556.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarUwe Hermann <uwe@hermann-uwe.de>
      1dfe0ff1
  11. 26 May, 2009 1 commit
  12. 22 May, 2009 1 commit
  13. 17 May, 2009 1 commit
    • Carl-Daniel Hailfinger's avatar
      Use accessor functions for MMIO · 78185dcb
      Carl-Daniel Hailfinger authored
      
      Some MMIO accesses used volatile, others didn't (and risked
      non-execution of side effects) and even with volatile, some accesses
      looked dubious.
      
      Since the MMIO accessor functions and the onboard flash accessor
      functions are functionally identical (but have different signatures),
      make the flash accessors wrappers for the MMIO accessors.
      
      For some of the conversions, I used Coccinelle. Semantic patch follows:
      
      @@ typedef uint8_t; expression a; volatile uint8_t *b; @@ - b[a] + *(b
      + a) @@ expression a; volatile uint8_t *b; @@ - *(b) |= (a); + *(b) =
      *(b) | (a); @@ expression a; volatile uint8_t *b; @@ - *(b) = (a); +
      mmio_writeb(a, b); @@ volatile uint8_t *b; @@ - *(b) + mmio_readb(b) @@
      type T; T b; @@ ( mmio_readb | mmio_writeb ) (..., - (T) - (b) + b )
      
      Corresponding to flashrom svn r524.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      
      Uwe tested read, write, erase with this patch on a random board to make
      sure nothing breaks.
      Acked-by: default avatarUwe Hermann <uwe@hermann-uwe.de>
      78185dcb
  14. 16 May, 2009 2 commits
  15. 15 May, 2009 1 commit
  16. 10 May, 2009 1 commit
    • Carl-Daniel Hailfinger's avatar
      Create a SB600 SPI detection heuristic · dbfa0291
      Carl-Daniel Hailfinger authored
      
      I know that the data sheets say we can't read the ROM straps, but
      creative interpretation of the data sheets yielded a heuristic which
      should work pretty well.
      
      NOTE: If you test this, make sure you power down and _unplug_ the
      machine for a few minutes before you boot and run flashrom with this
      patch.
      If the machine is not unplugged for some time, the test will yield
      incorrect results.
      If you run a slightly older flashrom version than svn HEAD, the test
      will yield incorrect results.
      If you run any flashrom version (except svn HEAD plus this patch) after
      poweron, the test will yield incorrect results.
      
      Explanation:
      Older flashrom versions unconditionally write to registers which are
      used for this heuristic. These registers are in the S5 power domain, so
      even powering down does not clear them, you really have to unplug the
      machine and remove the battery if this is a laptop.
      
      Corresponding to flashrom svn r491.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarStefan Reinauer <stepan@coresystems.de>
      dbfa0291
  17. 08 May, 2009 1 commit
  18. 07 May, 2009 1 commit
  19. 06 May, 2009 5 commits
  20. 05 May, 2009 2 commits
  21. 04 May, 2009 1 commit
  22. 15 Apr, 2009 1 commit
  23. 01 Feb, 2009 1 commit
  24. 26 Jan, 2009 2 commits
  25. 23 Jan, 2009 1 commit
  26. 18 Jan, 2009 1 commit
  27. 07 Jan, 2009 2 commits
  28. 22 Dec, 2008 1 commit
  29. 15 Dec, 2008 1 commit
    • FENG yu ning's avatar
      Various ichspi.c refinements · f041e9b5
      FENG yu ning authored
      
      * add a generic preop-opcode-pair table.
      
      * rename ich_check_opcodes to ich_init_opcodes.
      
      * let ich_init_opcodes do not need to access flashchip structure:
        . move the definition of struct preop_opcode_pair to a better place
        . remove preop_opcode_pairs from 'struct flashchip'
        . modify ich_init_opcodes and generate_opcodes so that they do not access the flashchip structure
      
      * call ich_init_opcodes during chipset enable. Now OPCODES generation mechanism works.
      
      * fix a coding style mistake.
      
      Corresponding to flashrom svn r367 and coreboot v2 svn r3814.
      Signed-off-by: default avatarFENG yu ning <fengyuning1984@gmail.com>
      Acked-by: default avatarPeter Stuge <peter@stuge.se>
      f041e9b5
  30. 08 Dec, 2008 1 commit
  31. 05 Dec, 2008 1 commit