GitLab

However, wrap the write functions in a compat layer to allow converting
the rest of flashrom later. Tested on Intel NM10 by David Hendricks.

Corresponding to flashrom svn r1080.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>

Constify variables where possible.
Initialize programmer-related variables explicitly in programmer_init to
allow running programmer_init from a clean state after
programmer_shutdown.
Prohibit registering programmer shutdown functions before init or after
shutdown.
Kill some dead code.
Rename global variables with namespace-polluting names.
Use a previously unused locking helper function in sst49lfxxxc.c.

This is needed for libflashrom.

Effects on the binary size of flashrom are minimal (300 bytes
shrinkage), but the data section shrinks by 4384 bytes, and that's a
good thing if flashrom is operating in constrained envionments.

Corresponding to flashrom svn r1068.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>

ICH SPI can enforce address restrictions for all accesses which take an
address (well, it could if the chipset implementation was not broken).
Since exploiting the broken implementation is harder than conforming
to the address restrictions wherever possible, conform to the address
restrictions instead. This patch eliminates a lot of transaction errors
people were seeing on chip probe.

Corresponding to flashrom svn r1016.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

- x86/x86_64 (little endian)
- PowerPC (big endian)
- MIPS (big+little endian)

No changes to programmer specific code. This means any drivers with MMIO
access will _not_ suddenly start working on big endian systems, but with
this patch everything is in place to fix them.

Compilation should work on all architectures listed above for all
drivers except nic3com and nicrealtek which require PCI Port IO which is
x86-only for now.

To compile without nic3com and nicrealtek, run
make distclean
make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no

Thanks to Misha Manulis for testing early versions of this patch on
PowerPC (big endian) with the satasii programmer.
Thanks to Segher Boessenkool for design review and for helping out with
compiler tricks and pointing out that we need eieio on PowerPC.
Thanks to Vladimir Serbinenko for compile testing on MIPS (little
endian) and PowerPC (big endian) and for runtime testing on MIPS (little
endian).
Thanks to David Daney for compile testing on MIPS (big endian).
Thanks to Uwe Hermann for compile and runtime testing on x86_64.

DO NOT RUN flashrom ON NON-X86 AFTER APPLYING THIS PATCH!
This patch only provides the infrastructure, but does not convert any
drivers, so flashrom will compile, but it won't do the right thing on
non-x86 platforms.

Corresponding to flashrom svn r1013.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Misha Manulis <misha@manulis.com>
Acked-by: Vladimir 'phcoder/φ-coder' Serbinenko <phcoder@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Segher Boessenkool <segher@kernel.crashing.org>

Every SPI programmer driver had its own completely different chip write
implementation, and all of them were insufficiently commented. Create
spi_write_chunked as a copy of spi_read_chunked and convert all SPI
programmers to use it. No functional changes except: - Bus Pirate uses
12 Byte writes instead of 8 Byte writes - SB600 uses 5 Byte writes
instead of 1 Byte writes

Corresponding to flashrom svn r1005.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: David Hendricks <dhendrix@google.com>

Convert programmer print messages to msg_p* convert general print messages to msg_g* a few fixes as suggested by Carl-Daniel.

Corresponding to flashrom svn r997.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

 - Fix a number of typos (found via ispell).

 - Use correct vendor names (as per their websites) consistently.

Corresponding to flashrom svn r985.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Some of the spi programmer drivers required chipdrivers.h, needs fixing later:
  it87spi.c
  ichspi.c
  sb600spi.c
  wbsio_spi.c
  buspirate_spi.c
  ft2232spi.c
  bitbang_spi.c
  dediprog.c

Corresponding to flashrom svn r914.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

This megapatch rewrites substantial parts of ICH SPI to actually do
what the SPI layer wants instead of its own weird idea about commands
(running unrequested commands, running modified commands). Besides that,
there is a fair share of cleanups as well.

- Add JEDEC_EWSR (Enable Write Status Register) to default commands. -
Mark a no longer used opcode/preopcode table as unused. - Declare all
commands as non-atomic/standalone by default. The ICH SPI driver has
no business executing commands (preopcodes) automatically if they were
not requested. - Automatically adjust preopcode/opcode pairings (like
WREN+ERASE) based on what the SPI layer requested. The ICH SPI driver
has no business executing altered opcode pairs as it sees fit. - Fix
incomplete initialization in the case of a locked down chipset. Leaving
the first 4 opcodes with uninitialized pairings had unpredictable
results. - switch() exists for a reason. Nested if() checking on the
same variable is an interesting style. - Actually check if the requested
readcnt/writecnt for a command is supported by the hardware instead
of delivering corrupt/incomplete commands and data. - If a command
has unsupported readlen/writelen, complain loudly to the user. - Use
find_opcode instead of open-coding the same stuff in a dozen variations.
- Introduce infrastructure for updating the command set of unlocked
chipsets on the fly.

Corresponding to flashrom svn r894.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: David Hendricks <dhendrix@google.com>

Programmer debug messages during programmer init/shutdown are useful
because they print hardware settings and desired configuration.

They help in getting a quick overview of hardware and software state on
startup and shutdown.

Programmer debug messages during flash chip access are mostly a
distraction in logs and should only be enabled if someone is having
problems which are suspected to stem from a programmer hardware or
programmer software bug. Disable those messages by default, they can be
reenabled by #define COMM_DEBUG in the affected programmer file.

An added benefit is a tremendous size reduction in verbose
probe/read/write/erase logs because only flash chip driver messages
remain. In some cases, logs will shrink from 65 MB to 10 kB or less.

The right(tm) fix would be two different debug levels (DEBUG and SPEW)
and the ability to differentiate between programmer debug messages and
flash chip debug messages. Until the design for the message printing
infrastructure is finished, this is the best stop-gap measure we can
get.

Corresponding to flashrom svn r834.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audioahcked@gmail.com>

The existing code does not work for all SPI chips, and it just was a
band-aid to cope with locked down chipsets back in a time when there was
no eraseblock infrastructure.
Basically, this unbreaks a few SPI chips on ICH.

Corresponding to flashrom svn r777.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Maciej Pijanka <maciej.pijanka@gmail.com>

Since we don't have any debug level printing infrastructure yet, I
propose to kill the obnoxious debug message in ichspi.c which was added
to check for correct PREOP handling.

We know the code works fine (after getting a few reports over 100 MB
long) and there's no point in keeping it around anymore. If there is any
desire, we can reinstate it as print_spew or whatever once the debug
level infrastructure is merged, but at that point we probably just are
happy that the debug output isn't there anymore.

Corresponding to flashrom svn r753.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>

The current ICH SPI preop handling is a hack which spews lots of warnings, but still yields correct results

With the multicommand infrastructure I introduced in r645, it became
possible to integrate ICH SPI preopcodes cleanly into the flashrom
design.

The new code checks for every opcode in a multicommand array if it is a
preopcode. If yes, it checks if the next opcode is associated with that
preopcode and in that case it simply runs the opcode because the correct
preopcode will be run automatically before the opcode.

Corresponding to flashrom svn r727.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>

The __func__ variant is standardized in C99 and recommended to be
used instead of __FUNCTION__ in the gcc info page.

Only _very_ old versions of gcc did not know about __func__, but we've
been using both __func__ and __FUNCTION__ for a long while now, and
nobody complained about this, so all our users seem to use recent
enough compilers.

Corresponding to flashrom svn r711.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

Serprog compilation is now controlled by a Makefile variable.
Replace munmap with physunmap where appropriate.

Corresponding to flashrom svn r671.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

This brings the SPI code in line with the generic programmer
infrastructure.

This patch is a reworked version of a patch by Jakob Bornecrantz.

Corresponding to flashrom svn r657.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Jakob Bornecrantz <wallbraker@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Some drivers support only a few combinations of read/write length and
return error otherwise. Having a distinct return code for this error
means we can handle it in upper layers.

Corresponding to flashrom svn r653.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

Some SPI opcodes need to be sent in direct succession after each other
without any chip deselect happening in between. A prominent example is
WREN (Write Enable) directly before PP (Page Program). Intel calls the
first opcode in such a row "preopcode".

Right now, we ignore the direct succession requirement completely and it
works pretty well because most onboard SPI masters have a timing or
heuristics which make the problem disappear.
The FT2232 SPI flasher is different. Since it is an external flasher,
timing is very different to what we can expect from onboard flashers and
this leads to failure at slow speeds.

This patch allows any function to submit multiple SPI commands in a
stream to any flasher. Support in the individual flashers isn't
implemented yet, so there is one generic function which passes the each
command in the stream one-by-one to the command functions of the
selected SPI flash driver.
Tested-by: Jakob Bornecrantz <wallbraker@gmail.com>

Corresponding to flashrom svn r645.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Jakob Bornecrantz <wallbraker@gmail.com>

Since block erase functions do not know the block length (it's not
specified in any standard), block erase functions now get an additional
parameter blocklen. This enables flashrom to verify the erase result for
block erase functions at correct boundaries.

Tested by Uwe on SB600.

Corresponding to flashrom svn r630.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

This shortens the code a lot and makes it more readable.

Corresponding to flashrom svn r600.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>

That means you can tell flashrom to read exactly bytes 12345-56789
(start 12345, length 44445) and it will not fetch a single byte more.

Uwe tested this on one LPC, one SPI, and one parallel flash board.

Corresponding to flashrom svn r596.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

This was partly due to a design problem in the abstraction layer.

There should be exactly two different functions for reading SPI chips:
- memory mapped reads
- SPI command reads.

Each of them should be contained in a separate function, optionally
taking parameters where needed.

This patch solves the problems mentioned above, shortens the code and
makes the code logic a lot more obvious.

Since open-coding the min() function leads to errors, include it in this
patch as well.

Corresponding to flashrom svn r589.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>

Add external programmer delay functions so external programmers can
handle the delay on their own if needed.

Corresponding to flashrom svn r578.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Urja Rannikko <urjaman@gmail.com>

Right now, the annotation only differentiates between SPI and non-SPI.
Anyone who knows more about a specific flash chip should feel free to
update it.

The existing flashbus variable was abused to denote the SPI controller
type. Use an aptly named variable for that purpose.

Once this patch is merged, the chipset/programmer init functions can set
supported flash chip types and flashrom can automatically select only
matching probe/read/erase/write functions. A side benefit of that will
be the elimination of the Winbond W29EE011 vs. AMIC A49LF040A conflict.

Corresponding to flashrom svn r556.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

RES is Read Electronic Signature (1 Byte, identical for different chips)
REMS is Read Electronic Manufacturer Signature (2 Bytes, mostly unique)
RDID is Read JEDEC ID (3 bytes, unique)

Of the chips which don't support RDID, a sizable portion supports REMS
which gives us both a manufacturer ID and a device ID. This is clearly
superior to having only a device ID (the RES case) which has multiple
documented collisions.

The RES/REMS problem is aggravated by inconsistent naming in vendor data
sheets. What's in a name? Considering that we have 1-byte IDs, 2-byte
IDs and 3+byte IDs with varying names but mostly consistent opcodes, it
makes sense to set our own standard about how the opcodes are called.

The best way forward would be to have the ICH SPI driver reprogram the
opcode menu on the fly if the opcode menu doesn't contain the requested
opcode and the opcode menu is not locked. Until that happens, this patch
improves detection accuracy by a factor of 256 for some chips.

Corresponding to flashrom svn r549.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Tested-by: Uwe Hermann
with the flash chip "SST SST25VF040.REMS".
Acked-by: Ronald G. Minnich <rminnich@gmail.com>

Some MMIO accesses used volatile, others didn't (and risked
non-execution of side effects) and even with volatile, some accesses
looked dubious.

Since the MMIO accessor functions and the onboard flash accessor
functions are functionally identical (but have different signatures),
make the flash accessors wrappers for the MMIO accessors.

For some of the conversions, I used Coccinelle. Semantic patch follows:

@@ typedef uint8_t; expression a; volatile uint8_t *b; @@ - b[a] + *(b
+ a) @@ expression a; volatile uint8_t *b; @@ - *(b) |= (a); + *(b) =
*(b) | (a); @@ expression a; volatile uint8_t *b; @@ - *(b) = (a); +
mmio_writeb(a, b); @@ volatile uint8_t *b; @@ - *(b) + mmio_readb(b) @@
type T; T b; @@ ( mmio_readb | mmio_writeb ) (..., - (T) - (b) + b )

Corresponding to flashrom svn r524.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Uwe tested read, write, erase with this patch on a random board to make
sure nothing breaks.
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

They serve pretty much no purpose, compilers can optimize pretty much
all of what we might mark as inline anyway, _and_ inlines are not
enforced in any way by the compiler either. They're totally unneeded.
Kill them.

Corresponding to flashrom svn r522.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Build-tested on 32bit x86.

Corresponding to flashrom svn r521.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Among others, I have seen the following problems: - The SPI opcode is
not supported by the controller. ICH-style controllers exhibit this if
SPI config is locked down. - The address in in a prohibited area. This
can happen on ICH for any access (BBAR) and for writes in chipset write
protected areas. - There is no SPI controller.

Introduce separate error codes for unsupported opcode and prohibited
address.

Add the ability to adjust REMS and RES addresses to the minium supported
read address with the help of spi_get_valid_read_addr(). That function
needs to call SPI controller specific functions like reading BBAR on
ICH.

Corresponding to flashrom svn r500.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Since many commands take around 10 microseconds to complete, it is
totally pointless to wait for 1000 microseconds before checking the
status again.

This patch is tested and reduced write time on ICH7 with SST25VF080B
from over one hour to 62 seconds.

Thanks to Ali Nadalizadeh for testing!

Corresponding to flashrom svn r487.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Myles Watson <mylesgw@gmail.com>

Change SPI architecture to handle 1-byte chunk chip writing differently
from 256-byte chunk chip writing.

Annotate SPI chip write functions with _256 or _1 suffix denoting the
number of bytes they write at maximum.

The 1-byte chunk writing is cut-n-pasted to different SPI drivers right
now. A later patch can move them to the generic spi_chip_write_1.

Corresponding to flashrom svn r485.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Corresponding to flashrom svn r429 and coreboot v2 svn r4117.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Thanks Patrick!

Corresponding to flashrom svn r410 and coreboot v2 svn r3918.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>

Corresponding to flashrom svn r383 and coreboot v2 svn r3862.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>

* add a generic preop-opcode-pair table.

* rename ich_check_opcodes to ich_init_opcodes.

* let ich_init_opcodes do not need to access flashchip structure:
  . move the definition of struct preop_opcode_pair to a better place
  . remove preop_opcode_pairs from 'struct flashchip'
  . modify ich_init_opcodes and generate_opcodes so that they do not access the flashchip structure

* call ich_init_opcodes during chipset enable. Now OPCODES generation mechanism works.

* fix a coding style mistake.

Corresponding to flashrom svn r367 and coreboot v2 svn r3814.
Signed-off-by: FENG yu ning <fengyuning1984@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>

Corresponding to flashrom svn r364 and coreboot v2 svn r3805.
Signed-off-by: FENG yu ning <fengyuning1984@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

Currently flashrom assumes every vendor BIOS shares our view about which
SPI opcodes should be placed in which location.

Move to a less optimistic implementation and actually use the generic
SPI read functions. They're useful for abstracting exactly this stuff
and that makes them the preferred choice.

Corresponding to flashrom svn r346 and coreboot v2 svn r3758.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

Not all chips support all commands, so allow the implementer to select
the matching function. Fix a layering violation in ICH SPI code to be
less bad. Still not perfect, but the new code is shorter, more generic
and architecturally more sound.

TODO (in a separate patch): - move the generic sector erase code to
spi.c - decide which erase command to use based on info about the chip -
create a generic spi_erase_all_sectors function which calls the generic
sector erase function

Thanks to Stefan for reviewing and commenting.

Corresponding to flashrom svn r337 and coreboot v2 svn r3722.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

This is slightly slower (ha, ha), but works on boards with a locked
opmenu. Tested on ICH7 and works.

Corresponding to flashrom svn r336 and coreboot v2 svn r3721.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Corresponding to flashrom svn r326 and coreboot v2 svn r3669.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>