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Kestrel Collaboration
Kestrel LiteX
tercelspi
Commits
b1bdcdd5
Commit
b1bdcdd5
authored
4 years ago
by
Raptor Engineering Development Team
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Break up Wishbone master and SPI PHY files
parent
775cae78
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tercelspi/tercelspi.py
tercelspi/tercelspi.py
+2
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tercelspi/tercelspi.py
View file @
b1bdcdd5
...
...
@@ -158,4 +158,5 @@ class TercelSPI(Module, AutoCSR):
@
staticmethod
def
add_sources
(
platform
):
vdir
=
get_data_mod
(
"peripheral"
,
"tercelspi"
).
data_location
platform
.
add_source
(
os
.
path
.
join
(
vdir
,
"spi_master.v"
))
\ No newline at end of file
platform
.
add_source
(
os
.
path
.
join
(
vdir
,
"wishbone_spi_master.v"
))
platform
.
add_source
(
os
.
path
.
join
(
vdir
,
"phy.v"
))
\ No newline at end of file
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