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Kestrel Collaboration
Kestrel LiteX
migen
Commits
f8bea175
Commit
f8bea175
authored
6 years ago
by
whitequark
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test/test_fsm: fix typo.
parent
319d3cdc
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migen/test/test_fsm.py
migen/test/test_fsm.py
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migen/test/test_fsm.py
View file @
f8bea175
...
@@ -7,7 +7,7 @@ from migen.genlib.fsm import FSM
...
@@ -7,7 +7,7 @@ from migen.genlib.fsm import FSM
from
migen.test.support
import
SimCase
from
migen.test.support
import
SimCase
class
SyncFIFO
Case
(
SimCase
,
unittest
.
TestCase
):
class
FSM
Case
(
SimCase
,
unittest
.
TestCase
):
class
TestBench
(
Module
):
class
TestBench
(
Module
):
def
__init__
(
self
):
def
__init__
(
self
):
self
.
ctrl
=
Signal
()
self
.
ctrl
=
Signal
()
...
...
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