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Kestrel Collaboration
Kestrel LiteX
migen
Commits
f4180e9c
Commit
f4180e9c
authored
6 years ago
by
Sebastien Bourdeauducq
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vivado: print short timing info after phys_opt_design
parent
c65a2f38
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migen/build/xilinx/vivado.py
migen/build/xilinx/vivado.py
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migen/build/xilinx/vivado.py
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f4180e9c
...
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@@ -119,6 +119,7 @@ class XilinxVivadoToolchain:
tcl
.
append
(
"report_clock_utilization -file {}_clock_utilization.rpt"
.
format
(
build_name
))
tcl
.
append
(
"route_design"
)
tcl
.
append
(
"phys_opt_design"
)
tcl
.
append
(
"report_timing_summary -no_header -no_detailed_paths"
)
tcl
.
append
(
"write_checkpoint -force {}_route.dcp"
.
format
(
build_name
))
tcl
.
append
(
"report_route_status -file {}_route_status.rpt"
.
format
(
build_name
))
tcl
.
append
(
"report_drc -file {}_drc.rpt"
.
format
(
build_name
))
...
...
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