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Kestrel Collaboration
Kestrel LiteX
migen
Commits
83b209e3
Commit
83b209e3
authored
5 years ago
by
Sebastien Bourdeauducq
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metlino: add LEDs, I2C, Si5324, transceivers
parent
4289590d
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migen/build/platforms/sinara/metlino.py
migen/build/platforms/sinara/metlino.py
+92
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migen/build/platforms/sinara/metlino.py
View file @
83b209e3
...
@@ -3,6 +3,11 @@ from migen.build.xilinx import XilinxPlatform
...
@@ -3,6 +3,11 @@ from migen.build.xilinx import XilinxPlatform
_io
=
[
_io
=
[
(
"user_led"
,
0
,
Pins
(
"J24"
),
IOStandard
(
"LVCMOS33"
)),
# sfp0_led1
(
"user_led"
,
1
,
Pins
(
"J25"
),
IOStandard
(
"LVCMOS33"
)),
# sfp0_led2
(
"user_led"
,
2
,
Pins
(
"L25"
),
IOStandard
(
"LVCMOS33"
)),
# sfp1_led1
(
"user_led"
,
3
,
Pins
(
"K25"
),
IOStandard
(
"LVCMOS33"
)),
# sfp1_led2
(
"clk50"
,
0
,
Pins
(
"N24"
),
IOStandard
(
"LVCMOS33"
)),
(
"clk50"
,
0
,
Pins
(
"N24"
),
IOStandard
(
"LVCMOS33"
)),
(
"serial"
,
0
,
(
"serial"
,
0
,
...
@@ -11,6 +16,12 @@ _io = [
...
@@ -11,6 +16,12 @@ _io = [
IOStandard
(
"LVCMOS33"
)
IOStandard
(
"LVCMOS33"
)
),
),
(
"i2c"
,
0
,
Subsignal
(
"scl"
,
Pins
(
"N21"
)),
Subsignal
(
"sda"
,
Pins
(
"M21"
)),
IOStandard
(
"LVCMOS33"
)
),
# this is the second SPI flash (not containing the bitstream)
# this is the second SPI flash (not containing the bitstream)
# clock is shared with the bitstream flash and needs to be accessed
# clock is shared with the bitstream flash and needs to be accessed
# through STARTUPE3
# through STARTUPE3
...
@@ -72,6 +83,87 @@ _io = [
...
@@ -72,6 +83,87 @@ _io = [
Subsignal
(
"rxp"
,
Pins
(
"A4"
)),
Subsignal
(
"rxp"
,
Pins
(
"A4"
)),
Subsignal
(
"rxn"
,
Pins
(
"A3"
))
Subsignal
(
"rxn"
,
Pins
(
"A3"
))
),
),
(
"si5324"
,
0
,
Subsignal
(
"rst_n"
,
Pins
(
"AL13"
),
IOStandard
(
"LVCMOS33"
)),
Subsignal
(
"int"
,
Pins
(
"AK13"
),
IOStandard
(
"LVCMOS33"
))
),
(
"cdr_clk_clean"
,
0
,
Subsignal
(
"p"
,
Pins
(
"V6"
)),
Subsignal
(
"n"
,
Pins
(
"V5"
))
),
(
"mch_fabric_d"
,
0
,
Subsignal
(
"txp"
,
Pins
(
"AN4"
)),
Subsignal
(
"txn"
,
Pins
(
"AN3"
)),
Subsignal
(
"rxp"
,
Pins
(
"AP2"
)),
Subsignal
(
"rxn"
,
Pins
(
"AP1"
))
),
(
"mch_fabric_d"
,
1
,
Subsignal
(
"txp"
,
Pins
(
"AL4"
)),
Subsignal
(
"txn"
,
Pins
(
"AL3"
)),
Subsignal
(
"rxp"
,
Pins
(
"AK2"
)),
Subsignal
(
"rxn"
,
Pins
(
"AK1"
))
),
(
"mch_fabric_d"
,
2
,
Subsignal
(
"txp"
,
Pins
(
"AH6"
)),
Subsignal
(
"txn"
,
Pins
(
"AH5"
)),
Subsignal
(
"rxp"
,
Pins
(
"AH2"
)),
Subsignal
(
"rxn"
,
Pins
(
"AH1"
))
),
(
"mch_fabric_d"
,
3
,
Subsignal
(
"txp"
,
Pins
(
"AE4"
)),
Subsignal
(
"txn"
,
Pins
(
"AE3"
)),
Subsignal
(
"rxp"
,
Pins
(
"AD2"
)),
Subsignal
(
"rxn"
,
Pins
(
"AD1"
))
),
(
"mch_fabric_d"
,
4
,
Subsignal
(
"txp"
,
Pins
(
"AA4"
)),
Subsignal
(
"txn"
,
Pins
(
"AA3"
)),
Subsignal
(
"rxp"
,
Pins
(
"Y2"
)),
Subsignal
(
"rxn"
,
Pins
(
"Y1"
))
),
(
"mch_fabric_d"
,
5
,
Subsignal
(
"txp"
,
Pins
(
"U4"
)),
Subsignal
(
"txn"
,
Pins
(
"U3"
)),
Subsignal
(
"rxp"
,
Pins
(
"T2"
)),
Subsignal
(
"rxn"
,
Pins
(
"T1"
))
),
(
"mch_fabric_d"
,
6
,
Subsignal
(
"txp"
,
Pins
(
"AM6"
)),
Subsignal
(
"txn"
,
Pins
(
"AM5"
)),
Subsignal
(
"rxp"
,
Pins
(
"AM2"
)),
Subsignal
(
"rxn"
,
Pins
(
"AM1"
))
),
(
"mch_fabric_d"
,
7
,
Subsignal
(
"txp"
,
Pins
(
"AK6"
)),
Subsignal
(
"txn"
,
Pins
(
"AK5"
)),
Subsignal
(
"rxp"
,
Pins
(
"AJ4"
)),
Subsignal
(
"rxn"
,
Pins
(
"AJ3"
))
),
(
"mch_fabric_d"
,
8
,
Subsignal
(
"txp"
,
Pins
(
"AG4"
)),
Subsignal
(
"txn"
,
Pins
(
"AG3"
)),
Subsignal
(
"rxp"
,
Pins
(
"AF2"
)),
Subsignal
(
"rxn"
,
Pins
(
"AF1"
))
),
(
"mch_fabric_d"
,
9
,
Subsignal
(
"txp"
,
Pins
(
"AC4"
)),
Subsignal
(
"txn"
,
Pins
(
"AC3"
)),
Subsignal
(
"rxp"
,
Pins
(
"AB2"
)),
Subsignal
(
"rxn"
,
Pins
(
"AB1"
))
),
(
"mch_fabric_d"
,
10
,
Subsignal
(
"txp"
,
Pins
(
"W4"
)),
Subsignal
(
"txn"
,
Pins
(
"W3"
)),
Subsignal
(
"rxp"
,
Pins
(
"V2"
)),
Subsignal
(
"rxn"
,
Pins
(
"V1"
))
),
(
"mch_fabric_d"
,
11
,
Subsignal
(
"txp"
,
Pins
(
"R4"
)),
Subsignal
(
"txn"
,
Pins
(
"R3"
)),
Subsignal
(
"rxp"
,
Pins
(
"P2"
)),
Subsignal
(
"rxn"
,
Pins
(
"P1"
))
),
]
]
...
...
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