Commit 5ccee6c6 authored by Robert Jordens's avatar Robert Jordens
Browse files

vivado: run opt_design before place

* recommended as per
https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_2/ug894-vivado-tcl-scripting.pdf
* does not appear to be too expensive but beneficial to do here
parent 9d19ccbc
...@@ -109,6 +109,7 @@ class XilinxVivadoToolchain: ...@@ -109,6 +109,7 @@ class XilinxVivadoToolchain:
tcl.append("report_timing_summary -file {}_timing_synth.rpt".format(build_name)) tcl.append("report_timing_summary -file {}_timing_synth.rpt".format(build_name))
tcl.append("report_utilization -hierarchical -file {}_utilization_hierarchical_synth.rpt".format(build_name)) tcl.append("report_utilization -hierarchical -file {}_utilization_hierarchical_synth.rpt".format(build_name))
tcl.append("report_utilization -file {}_utilization_synth.rpt".format(build_name)) tcl.append("report_utilization -file {}_utilization_synth.rpt".format(build_name))
tcl.append("opt_design")
tcl.append("place_design") tcl.append("place_design")
if self.with_phys_opt: if self.with_phys_opt:
tcl.append("phys_opt_design -directive AddRetime") tcl.append("phys_opt_design -directive AddRetime")
......
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