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Kestrel Collaboration
Kestrel LiteX
migen
Commits
4e4833d0
Commit
4e4833d0
authored
6 years ago
by
Sebastien Bourdeauducq
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sayma_amc: AMC_MASTER_AUX_CLK is in a 3.3V bank, needs LVDS_25, cannot use termination
parent
47f4c595
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migen/build/platforms/sinara/sayma_amc.py
migen/build/platforms/sinara/sayma_amc.py
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migen/build/platforms/sinara/sayma_amc.py
View file @
4e4833d0
...
@@ -290,7 +290,7 @@ _io = [
...
@@ -290,7 +290,7 @@ _io = [
(
"aux_clk"
,
0
,
(
"aux_clk"
,
0
,
Subsignal
(
"p"
,
Pins
(
"AF10"
)),
Subsignal
(
"p"
,
Pins
(
"AF10"
)),
Subsignal
(
"n"
,
Pins
(
"AG10"
)),
Subsignal
(
"n"
,
Pins
(
"AG10"
)),
IOStandard
(
"LVDS
"
),
Misc
(
"DIFF_TERM_ADV=TERM_100
"
)
IOStandard
(
"LVDS
_25
"
)
),
),
# has 100R external termination resistor
# has 100R external termination resistor
...
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