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Quick Start · Changes

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Update Quick Start authored Mar 21, 2021 by Raptor Engineering Development Team's avatar Raptor Engineering Development Team
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Quick-Start.md
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...@@ -14,6 +14,10 @@ git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-too ...@@ -14,6 +14,10 @@ git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-too
git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-tooling/prjtrellis git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-tooling/prjtrellis
git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-tooling/ghdl git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-tooling/ghdl
git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-tooling/ghdl-yosys-plugin git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-tooling/ghdl-yosys-plugin
cd nextpnr
git submodule init
git submodule update
cd ../
cd prjtrellis cd prjtrellis
git submodule init git submodule init
git submodule update git submodule update
...@@ -85,6 +89,8 @@ git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-lit ...@@ -85,6 +89,8 @@ git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-lit
git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-litex/pythondata-peripheral-simplertc git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-litex/pythondata-peripheral-simplertc
git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-litex/pythondata-peripheral-swiftfsi git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-litex/pythondata-peripheral-swiftfsi
git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-litex/pythondata-peripheral-tercelspi git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-litex/pythondata-peripheral-tercelspi
git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-firmware/bare-metal-firmware
``` ```
**Install all packages** **Install all packages**
...@@ -95,7 +101,7 @@ git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-lit ...@@ -95,7 +101,7 @@ git clone https://gitlab.raptorengineering.com/kestrel-collaboration/kestrel-lit
``` ```
cd ../litex-boards/litex_boards/targets cd ../litex-boards/litex_boards/targets
./versa_ecp5.py --device=LFE5UM --cpu-type=microwatt --cpu-variant=standard+ghdl --with-ethernet --build ./versa_ecp5.py --device=LFE5UM --cpu-type=microwatt --cpu-variant=standard+ghdl+irq --with-ethernet --build
``` ```
**Program Versa board** **Program Versa board**
...@@ -115,7 +121,10 @@ Interact with serial console of bootloader using the special-purpose LiteX debug ...@@ -115,7 +121,10 @@ Interact with serial console of bootloader using the special-purpose LiteX debug
**Build firmware image** **Build firmware image**
``` ```
cd firmware cd bare-metal-firmware
mkdir build
cd build
cmake ..
make make
cd ../ cd ../
``` ```
...@@ -123,6 +132,6 @@ cd ../ ...@@ -123,6 +132,6 @@ cd ../
**Upload firmware to SoC** **Upload firmware to SoC**
``` ```
python3 ../../../litex/litex/tools/litex_term.py --speed 115200 /dev/ttyUSB0 --kernel firmware/firmware.bin python3 ../../../litex/litex/tools/litex_term.py --speed 115200 /dev/ttyUSB0 --kernel bare-metal-firmware/firmware.bin
reboot reboot
``` ```
\ No newline at end of file
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