- 13 Oct, 2020 3 commits
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enjoy-digital authored
init: Cast DDR4 RCD fine_speed to int
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David Shah authored
Fixes `TypeError: unsupported operand type(s) for |: 'int' and 'float'` for some clock frequencies. Signed-off-by: David Shah <dave@ds0.me>
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Florent Kermarrec authored
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- 12 Oct, 2020 8 commits
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enjoy-digital authored
Add dynamic write latency calibration.
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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- 08 Oct, 2020 11 commits
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
common/BitSlip: shift output by one bit (allow 1 cycle latency on writes), set reset value to cycles*dw-1.
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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- 07 Oct, 2020 1 commit
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Florent Kermarrec authored
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- 02 Oct, 2020 5 commits
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
OSERDESE2 has a latency of 2 sys_clk.
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Florent Kermarrec authored
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- 01 Oct, 2020 3 commits
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
rd/wrcmdphases are always computated as (rd/wrphase-1)%nphases so it's not useful to expose them as PhySettings. rd/wrcmdphases are now directly computated in Multiplexer and static/dynamic rd/wrphases are supported.
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- 30 Sep, 2020 9 commits
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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Florent Kermarrec authored
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