1. 26 Jul, 2011 1 commit
  2. 07 Jul, 2011 1 commit
  3. 03 Jul, 2011 1 commit
    • Uwe Hermann's avatar
      Fix and improve Windows/MinGW/MSYS build · d5e85d67
      Uwe Hermann authored
      
       - Makefile: Use $(OS_ARCH) to add some MinGW-specific workarounds and
         settings, so that a simple "make" is sufficient on MinGW (instead of
         manual Makefile hacking).
      
       - Explicitly set CC=gcc in the Makefile, otherwise you get an error like
         "cc: command not found" on MinGW.
      
       - MinGW doesn't have ffs(), use gcc's __builtin_ffs() instead.
      
       - Add /usr/local/include and /usr/local/lib to CPPFLAGS/LDFLAGS, that's
         where libusb-win32 and libftdi stuff is usually placed on MinGW/MSYS.
      
       - Disable serprog (no sockets) and all PCI-based programmers (no libpci)
         for now. That leaves dummy, ft2232_spi, and buspirate_spi enabled on
         MinGW per default.
      
       - serial.c: Use correct type for 'tmp', both on Windows/MinGW (DWORD)
         and POSIX (ssize_t).
      
      Corresponding to flashrom svn r1363.
      Signed-off-by: default avatarUwe Hermann <uwe@hermann-uwe.de>
      Acked-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      d5e85d67
  4. 26 Jun, 2011 1 commit
  5. 19 May, 2011 1 commit
    • Carl-Daniel Hailfinger's avatar
      Refine status register and lock printing of Atmel and AMIC SPI chips · 7a3bd8f2
      Carl-Daniel Hailfinger authored
      
      Add lock printing for AMIC A25L05PT, A25L05PU, A25L10PT, A25L10PU,
      A25L20PT, A25L20PU, A25L40PT, A25L40PU, A25L80P, A25L16PT, A25L16PU,
      A25L512, A25L010, A25L020, A25L040, A25L080, A25L016, A25L032, A25LQ032
      to a25.c.
      
      Add lock printing for Atmel AT26DF081A, AT26DF161, AT26DF161A,
      AT26DF321.
      
      Move Atmel AT25*/AT26* lock related functions originally added in r1115
      from spi25.c to at25.c.
      
      For SPI chips the lock printing was handled by one common function, but
      sharing a common function which only is a big switch() statement doesn't
      make sense, especially if we can define lock printing functions per
      flash chip anyway.
      
      The printlock function pointer in struct flashchip is used to print
      status register and locking information, and serves as replacement for
      implicit status register and lock printing during probe. That code will
      later be changed to store locking info in a machine- accessible data
      structure so flashrom can handle locked regions correctly.
      
      Corresponding to flashrom svn r1316.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
      7a3bd8f2
  6. 08 May, 2011 1 commit
  7. 18 Mar, 2011 1 commit
  8. 08 Mar, 2011 1 commit
  9. 28 Feb, 2011 1 commit
  10. 04 Feb, 2011 1 commit
  11. 05 Dec, 2010 1 commit
    • Carl-Daniel Hailfinger's avatar
      Add support for Winbond W39V040FB and W39V040FC · 9188240a
      Carl-Daniel Hailfinger authored
      
      Print lock status for all supported Winbond W39* chips:
      W39V040A, W39V040B, W39V040C, W39V040FA, W39V040FB, W39V040FC,
      W39V080A, W39V080FA, W39V080FA (dual mode).
      
      Fill in correct probe timing for Winbond W39V040C and W39V080FA.
      
      Please note that the W39V040B/W39V040FB pair has identical IDs,
      identical read/write/erase, but locking differs. Same applies to
      W39V040C/W39V040FC. This causes double detection on chipsets which
      support LPC and FWH, making flashing more difficult because the user
      has to select the correct chip. This is called the evil twin problem.
      A better evil twin handling (patch available) will resolve that problem.
      
      Corresponding to flashrom svn r1245.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarMichael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
      9188240a
  12. 03 Dec, 2010 1 commit
    • Mark Marshall's avatar
      Add support for the Open Graphics Project development card, OGD1, as a SPI flash programmer · 90021f28
      Mark Marshall authored
      The project is in the the process of designing and making a complete,
      open source, graphics card. More info at http://wiki.opengraphics.org.
      
      The first development card is a PCI add in card containing a couple of
      FPGAs and a couple of serial flash chips (amongst other things). The
      FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its
      own flash and does not need to be programmed by flashrom - it ensures
      that the device can enumerate on the PCI bus without needing further
      configuration.
      
      The larger FPGA is the S3. This is configured from a large SPI flash
      (2 MBytes). The second SPI flash is used to store the VGA BIOS. It is
      smaller (128 KBytes). This patch adds support for programming either of
      the two SPI flash chips.
      
      The programmer device takes one configuration option which selects which
      of the two flash chips is accessed. This must be set to either "cprom"
      or "bprom". (The project refers to th...
      90021f28
  13. 10 Oct, 2010 1 commit
    • Carl-Daniel Hailfinger's avatar
      Unify chip write functions · b30a5ed4
      Carl-Daniel Hailfinger authored
      
      The currently used write functions (wrappers) all use helpers which
      perform the actual write (inner functions).
      
      The signature of the write wrappers is: int write_chip(struct flashchip
      *flash, uint8_t * buf);
      
      The signature of the inner write functions varied a lot. This patch
      changes them to: int write_part(struct flashchip *flash, uint8_t *src,
      int start, int len);
      
      Did you know that flashrom has only 8 inner write functions for all
      flash chips? write_page_write_jedec_common write_sector_jedec_common
      write_sector_28sf040 spi_chip_write_256_new spi_chip_write_1_new
      spi_aai_write_new write_page_82802ab write_page_m29f400bt
      
      Export all inner write functions.
      
      Change the function signature of wait_82802ab to eliminate single-use
      variables.
      
      Remove an error message in write_page_m29f400bt which was printed for
      every byte written regardless of success.
      
      Add sharplhf00l04.c to the list of flash chip drivers in the Makefile.
      While the functions in there are unused, I suspect we will need them
      later, and by hooking the file up we ensure that compilation won't
      break.
      
      Corresponding to flashrom svn r1208.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarUwe Hermann <uwe@hermann-uwe.de>
      b30a5ed4
  14. 08 Oct, 2010 2 commits
  15. 06 Oct, 2010 1 commit
  16. 03 Sep, 2010 1 commit
    • Idwer Vollering's avatar
      Add Intel Gigabit NIC SPI flashing support · 004f4b79
      Idwer Vollering authored
      
      Tested on a 82541PI (0x8086, 0x107c) using 32-bit hardware.
      
      The last line in nicintel_request_spibus() could be changed so that FL_BUSY
      is used instead.
      
      Shortened sample log:
      [...]
      Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:03.0).
      Found chip "ST M25P10.RES" (128 KB, SPI) at physical address 0xfffe0000.
      Multiple flash chips were detected: M25P05.RES M25P10.RES
      Please specify which chip to use with the -c <chipname> option.
      [...]
      
      Corresponding to flashrom svn r1151.
      Signed-off-by: default avatarIdwer Vollering <vidwer@gmail.com>
      Acked-by: default avatarUwe Hermann <uwe@hermann-uwe.de>
      004f4b79
  17. 29 Jul, 2010 1 commit
  18. 28 Jul, 2010 1 commit
    • Carl-Daniel Hailfinger's avatar
      Add Nvidia nForce MCP61/MCP65/MCP67/MCP78S/MCP73/MCP79 SPI flashing support · 2f436168
      Carl-Daniel Hailfinger authored
      Huge thanks go to Michael Karcher for reverse engineering the interface
      and to Johannes Sjölund for testing the first iterations of my patch on
      his hardware until it worked.
      
      Thanks to the following testers of the patch:
      * MCP61, 10de:03e0, LPC OK, ECS Geforce6100SM-M, Andrew Cleveland
      * MCP61, 10de:03e0, LPC OK, Biostar NF520-A2 NF61D-A2, Vitaliy Buchynskyy
      * MCP65, 10de:0441, SPI OK, MSI MS-7369 K9N Neo-F v2, Kjell Braden
      * MCP65, 10de:0441, SPI OK, MSI MS-7369, Wolfgang Schnitker
      * MCP65, 10de:0441, SPI OK, MSI MS-7369, Johannes Sjölund
      * MCP65, 10de:0441, SPI OK, MSI MS-7369, Melchior Franz
      * MCP78S, 10de:075c, SPI OK, Asus M3N78 PRO, Brad Rogers
      * MCP78S, 10de:075c, SPI OK, Asus M3N78-VM, Marcel Partap
      * MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Kimmo Vuorinen
      * MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Vikram Ambrose
      * MCP79, 10de:0aad, SPI OK, Acer Aspire R3600, Andrew Morgan
      * MCP79, 10de:0aae, LPC ??, Lenovo Ideapad S...
      2f436168
  19. 21 Jul, 2010 1 commit
  20. 02 Jul, 2010 1 commit
  21. 25 Jun, 2010 1 commit
  22. 14 Jun, 2010 3 commits
  23. 07 Jun, 2010 2 commits
  24. 04 Jun, 2010 4 commits
  25. 31 May, 2010 1 commit
  26. 30 May, 2010 1 commit
  27. 26 May, 2010 1 commit
    • Carl-Daniel Hailfinger's avatar
      Handle the following architectures in generic flashrom code · cceafa2a
      Carl-Daniel Hailfinger authored
      
      - x86/x86_64 (little endian)
      - PowerPC (big endian)
      - MIPS (big+little endian)
      
      No changes to programmer specific code. This means any drivers with MMIO
      access will _not_ suddenly start working on big endian systems, but with
      this patch everything is in place to fix them.
      
      Compilation should work on all architectures listed above for all
      drivers except nic3com and nicrealtek which require PCI Port IO which is
      x86-only for now.
      
      To compile without nic3com and nicrealtek, run
      make distclean
      make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no
      
      Thanks to Misha Manulis for testing early versions of this patch on
      PowerPC (big endian) with the satasii programmer.
      Thanks to Segher Boessenkool for design review and for helping out with
      compiler tricks and pointing out that we need eieio on PowerPC.
      Thanks to Vladimir Serbinenko for compile testing on MIPS (little
      endian) and PowerPC (big endian) and for runtime testing on MIPS (little
      endian).
      Thanks to David Daney for compile testing on MIPS (big endian).
      Thanks to Uwe Hermann for compile and runtime testing on x86_64.
      
      DO NOT RUN flashrom ON NON-X86 AFTER APPLYING THIS PATCH!
      This patch only provides the infrastructure, but does not convert any
      drivers, so flashrom will compile, but it won't do the right thing on
      non-x86 platforms.
      
      Corresponding to flashrom svn r1013.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarMisha Manulis <misha@manulis.com>
      Acked-by: default avatarVladimir 'phcoder/φ-coder' Serbinenko <phcoder@gmail.com>
      Acked-by: default avatarUwe Hermann <uwe@hermann-uwe.de>
      Acked-by: default avatarSegher Boessenkool <segher@kernel.crashing.org>
      cceafa2a
  28. 21 May, 2010 1 commit
  29. 19 May, 2010 1 commit
  30. 15 May, 2010 1 commit
  31. 25 Apr, 2010 1 commit
    • Rudolf Marek's avatar
      Fix the DOS port · 837d8107
      Rudolf Marek authored
      
      Now the DS selector limit is set to 4GB and all mmio accesses goes
      through DS, the 1:1 mapping is fixed so the _DS base is taken onto
      account. Plus is that the hwaccess.c needs no change and memcpy etc can
      be used on mmaped space.
      
      Corresponding to flashrom svn r995.
      
      Signed-off-by: Rudolf Marek <r.marek@assembler.cz> 
      Acked-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      837d8107
  32. 27 Mar, 2010 1 commit
    • Carl-Daniel Hailfinger's avatar
      Add runtime and build environment info to the flashrom version message · 132e2ec6
      Carl-Daniel Hailfinger authored
      
      This patch uses code from Idwer Vollering and Maciej Pijanka.
      I've added Makefile support and compiler version printing and
      restructured the code heavily.
      The code prints runtime system information and buildtime libpci
      information (I couldn't find any runtime libpci version function). Due
      to our ability to cross-compile flashrom, buildtime system information
      from "uname -mrs" doesn't help diagnosing any problems. That's why only
      libpci and gcc are buildtime info, and the rest is runtime info.
      
      Examples:
      
      openSUSE 10.3, i686, gcc 4.2.1, with PCI support:
      flashrom v0.9.1-r971 on Linux 2.6.22.19-0.2-default (i686), built with
      libpci 2.2.6, GCC 4.2.1 (SUSE Linux)
      
      openSUSE 10.3, i686, llvm-clang-2.6.99svn97231, with PCI support:
      flashrom v0.9.1-r971 on Linux 2.6.22.19-0.2-default (i686), built with
      libpci 2.2.6, LLVM 1/clang 1
      
      openSUSE 11.1, x86_64, gcc 4.3.2, with PCI support:
      flashrom v0.9.1-r972 on Linux 2.6.27.29-0.1-default (x86_64), built with
      libpci 3.0.1, GCC 4.3.2 [gcc-4_3-branch revision 141291]
      
      openSUSE 10.3, i686, gcc 4.2.1, without PCI support:
      flashrom v0.9.1-r971 on Linux 2.6.22.19-0.2-default (i686), built with
      GCC 4.2.1 (SUSE Linux)
      
      Windows/cygwin, i686, gcc 4.3.4, without PCI support:
      flashrom v0.9.1-r973 on CYGWIN_NT-5.1 1.7.1(0.218/5/3) (i686), built
      with GCC 4.3.4 20090804 (release) 1
      
      FreeBSD 8.0, i386, gcc 4.2.1, with PCI support:
      flashrom v0.9.1-r973 on FreeBSD 8.0-RELEASE-p2 (i386), built with libpci
      3.1.7, GCC 4.2.1 20070719  [FreeBSD]
      
      Corresponding to flashrom svn r987.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Signed-off-by: default avatarIdwer Vollering <vidwer@gmail.com>
      Acked-by: default avatarMaciej Pijanka <maciej.pijanka@gmail.com>
      132e2ec6
  33. 22 Mar, 2010 1 commit