1. 05 May, 2009 2 commits
  2. 04 May, 2009 4 commits
  3. 03 May, 2009 1 commit
  4. 01 May, 2009 6 commits
  5. 29 Apr, 2009 1 commit
  6. 28 Apr, 2009 1 commit
  7. 26 Apr, 2009 1 commit
  8. 25 Apr, 2009 1 commit
  9. 24 Apr, 2009 1 commit
  10. 23 Apr, 2009 2 commits
  11. 22 Apr, 2009 1 commit
    • Carl-Daniel Hailfinger's avatar
      All "unknown xy SPI chip" entries claim to have status UNTESTED for probe/read/erase/write · 42882fd9
      Carl-Daniel Hailfinger authored
      
      That is incorrect.
      
      A bit of confusion comes from how the #defines are named. We call them
      TEST_BAD_*, but the message printed by flashrom says: "This flash part
      has status NOT WORKING for operations:"
      
      Something that is unimplemented is definitely not working.
      
      Neither of the chip entries mentioned above has erase or write functions
      implemented, so erase and write are not working. Since their size is
      unknown, we can't read them in. That means read is not working as well.
      Probing is a different matter. If a chip-specific probe function had
      matched, we wouldn't have to handle the chip with the "unknown xy SPI
      chip" fallback. I'm tempted to call that "not working" as well, but I'm
      open to discussion on this point.
      
      Corresponding to flashrom svn r439 and coreboot v2 svn r4177.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarUwe Hermann <uwe@hermann-uwe.de>
      42882fd9
  12. 21 Apr, 2009 3 commits
  13. 20 Apr, 2009 3 commits
  14. 19 Apr, 2009 2 commits
  15. 17 Apr, 2009 1 commit
  16. 15 Apr, 2009 1 commit
  17. 13 Apr, 2009 1 commit
  18. 11 Apr, 2009 1 commit
  19. 10 Apr, 2009 2 commits
  20. 09 Apr, 2009 1 commit
  21. 30 Mar, 2009 1 commit
  22. 19 Mar, 2009 1 commit
  23. 17 Mar, 2009 1 commit
    • Stefan Reinauer's avatar
      This patch adds "high coreboot table support" to coreboot version 2 · 2d853bb5
      Stefan Reinauer authored
      
      Some bootloaders seem to overwrite memory starting at 0x600, thus destroying
      the coreboot table integrity, rendering the table useless.
      
      By moving the table to the high tables area (if it's activated), this problem
      is fixed.
      
      In order to move the table, a 40 bytes mini coreboot table with a single sub
      table is placed at 0x500/0x530 that points to the real coreboot table. This is
      comparable to the ACPI RSDT or the MP floating table.
      
      This patch also adds "table forward" support to flashrom and nvramtool.
      
      Corresponding to flashrom svn r421 and coreboot v2 svn r4012.
      Signed-off-by: default avatarStefan Reinauer <stepan@coresystems.de>
      Acked-by: default avatarPeter Stuge <peter@stuge.se>
      2d853bb5
  24. 06 Mar, 2009 1 commit