GitLab

This patch adds a CONFIG_EVERYTHING flag to the Makefile
that sets all CONFIG_* flags to "yes" if they were "no".

This provides a comfortable way to ensure maximum code exposure
to tools like coverity[0] or clang's scan-build.

[0] https://scan.coverity.com/projects/1020



Corresponding to flashrom svn r1869.
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Corresponding to flashrom svn r1868.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

This is based on the code sent to the flashrom mailing list
by Alex Lu (alexlu6@mxic.com.tw) without sign-off.

Corresponding to flashrom svn r1867.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

 - /usr/include/cpu/param.h defines PAGE_MASK already, hence use another
   name for the respective macro in nicintel_eeprom.c.
 - Since DragonflyBSD 3.6 DPorts is used as the default package manager.
   Therefore we should use /usr/local/ instead of /usr/pkg/ on default
   to fetch libraries.

Corresponding to flashrom svn r1866.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

AR defaults to "ar" anyway in GNU make and instead of gcc it is probably a
better idea to use just cc. The latter allows to build on freebsd 10 without
overriding CC or doing symlink tricks (because it uses clang as cc, provides
multiple gcc packages but only versioned binaries without any actual "gcc"
command name in the path).

Corresponding to flashrom svn r1865.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

We do CPU architecture checks once for the makefile in arch.h and
once for HW access abstraction in hwaccess.c. This patch unifies
related files so that they can share the checks to improve
maintainability and reduce the chance of inconsistencies.
Furthermore, it refines some of the definitions, which
 - adds "support" for AARCH64 and PPC64,
 - adds big-endian handling on arm as well as LE handling on PPC64,
 - fixes compilation of internal.c on AARCH64 and PPC64.

Additionally, this patch continues to unify all OS checks in
flashrom by adding a new helper macro IS_WINDOWS.

The old header file for architecture checking is renamed to platform.h
to reflect its broader scope and all new macros are add in there.

Corresponding to flashrom svn r1864.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Gets rid of a few DOS-specific Makefile hacks.

Corresponding to flashrom svn r1863.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Up to now, when compiling flashrom outside a VCS it would print two
warnings that are not very clear to the user. This patch adds a new
auxilary function to getrevision.sh and uses it in the makefile to print a
single and more meaningful message to the user while hiding the
warnings from getrevision.sh.

Corresponding to flashrom svn r1862.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Silvermont (Bay Trail, Rangeley, Avoton) seems to still use the old
density encoding with 3 bits per chip. Documentation is unavailable
(held concealed by Intel) but thanks to the efforts of Tai-Hong
(Type) Wu the layout is clear now. This patch is based on his one
but solves the issue differently thus reducing the code complexity.

Corresponding to flashrom svn r1861.
Signed-off-by: Tai-Hong Wu <thwu@lunartoday.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Basically, among other chips, MSTAR manufactures SoCs that equip TV sets
and computer screens, and it seems that all of their products use the
same in-system programming protocol. Basically, they use the DDC channel
of VGA or DVI connectors, which is actually an I2C bus, to encapsulate
SPI frames (the flash chip is connected to the SoC through an SPI bus).

I wrote this patch since the screen I bought had a software bug, and the
manufacturer only released a new firmware binary, but no tool or
instructions on flashing it.

More details can be found here:
http://boeglin.org/blog/index.php?entry=Flashing-a-BenQ-Z-series-for-free(dom)



I only read code from Linux kernel archives published by Acer to figure
out the protocol (for a touchscreen controller and an NFC chip, both by
MSTAR, that share the same ISP protocol), so I don't think there are
any legal problems with it.

Compilation is currently disabled by default in the Makefile.
If in doubt, additional Makefile bugs were added by Stefan.

Corresponding to flashrom svn r1860.
Signed-off-by: Alexandre Boeglin <alex@boeglin.org>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Since r1833 we added the offset of the virtual register in several
functions, which produced segfaults. This patch renames a few
parameters and reorganizes/fixes various parts of the
changelock_regspace2_block() function - hence the rather big diff.

Thanks to Roman Lebedev for reporting this issue and testing numerous
revisions of this patch.

Corresponding to flashrom svn r1859.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

This flash chip can be configured (one time) to use 64 KiB or 256 KiB sectors.
Additionally, in the 64 KiB mode it supports 16 4 KiB sub-sectors that can be
(one time) programmed to be on the top or bottom of the device. The sub-sectors
can be erased with the 0x20 opcode but because this opcode does not work
with the remaining sectors and flashrom can not cope with that the 0x20
opcode is not supported yet.

This patch adds two definitions, one for the 64 KiB and 256 KiB configuration
respectively. The device also shares the RDID with the various S25FL128
devices so we have to increase the maximum number of successfully probed
chips to 8.

The 64 KiB mode was tested on real hardware.

Corresponding to flashrom svn r1858.
Signed-off-by: Jernej Škrabec <jernej.skrabec@planet.si>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Both use the same ID and are mostly identical.

Corresponding to flashrom svn r1857.
Tested-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

The Intel 82599 series of 10 GbE controllers has a bit-banged SPI
interface that's register-compatible with the one in the 1 GbE
controllers, except the register addresses are shifted up by
0x10000, cf. Intel document 331520:
http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/82599-10-gbe-controller-datasheet.pdf

This patch was tested with a board that has the 0x10fc device and a Micron
M25P40 SPI flash chip. The PCI IDs and names for the devices are per Intel document 331521
https://www-ssl.intel.com/content/dam/www/public/us/en/documents/specification-updates/82599-10-gbe-controller-spec-update.pdf


and the PCI SIG device ID registry with small refinements.

Corresponding to flashrom svn r1856.
Signed-off-by: Ed Swierk <eswierk@skyportsystems.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

This board was used/sold by Fujitsu. The board enabled was tested (sadly
with the wrong image, i.e. one of the GA-8SIMLH images directly from
GIGABYTE instead of one from Fujitsu).

Corresponding to flashrom svn r1855.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

The strdup calls were a leftover that slipped through the cleanup in
r1577.

Found-by: Valgrind 3.10.0

Corresponding to flashrom svn r1854.
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Corresponding to flashrom svn r1853.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

ISO C and POSIX require to call ctype functions with values representable
by unsigned char. We have used a char as input so far which might be
negative and hence get sign-extended.

Corresponding to flashrom svn r1852.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

 - Introduce a variable in doit() that allows to influence
   read-before-write and its consequences.
 - Modify build_new_image so that it still works even if the old content
   is not read before.
 - Add copy_old_content() to ease the pain for future patches.

Corresponding to flashrom svn r1851.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Read-tested by Peter Ruesch.

Corresponding to flashrom svn r1850.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Without this patch dmi_shutdown calls free() on read-only strings.

Corresponding to flashrom svn r1849.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

The former will be useful in cases where cleanup equals a simple call to free().

Corresponding to flashrom svn r1848.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

 - Create distinct functions for mapping and unmapping for flash chips.
 - Map only when needed: map before probing and unmap immediately
   after it. Map again when a single chip was probed successfully before
   taking any actual actions and clean up afterwards.
 - Map special function chip registers centrally together with flash space
   instead of within (some) probing methods after successful probes.
 - Save the used base addresses of the mappings in struct flashctx as well.
 - Do not try to (un)map the zero-sized chip definitions that are merely hacks.
   This also fixes the printing of wrong warnings for these chip definitions
   introduced in r1765.

Corresponding to flashrom svn r1847.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Corresponding to flashrom svn r1846.
Signed-off-by: Michael Coppola <michael.n.coppola@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

The Wildcat Point PCH can be paired with Broadwell or Haswell.
This patch was essentially backported from ChromiumOS commit 9bd2af8.

Corresponding to flashrom svn r1845.
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

The core of this patch to support Bay Trail originally came from the
Chromiumos flashrom repo and was modified by Sage to support the
Rangeley/Avoton parts as well.
Because that was not complicated enough already Stefan Tauner refactored
and refined everything. Bay Trail seems to be the first Atom SoC able to
support hwseq. No SPI Programming Guide could be obtained so it is
handled similarly to Lynx Point which seems to be its nearest relative.

Corresponding to flashrom svn r1844.
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Martin Roth <gaumless@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Marc Jones <marcj303@gmail.com>
Tested-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Thomas Reardon <thomas_reardon@hotmail.com>
Tested-by: Wen Wang <wen.wang@adiengineering.com>
Acked-by: Marc Jones <marcj303@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Possible values as well as encodings have changed in newer chipsets as follows.
 - Pre-PCH (i.e. ICH) chipsets had a maximum frequency of 33 MHz for all
   operations
 - Since Cougar Point the chipsets support dual output fast reads (encoded
   in bit 30).
 - Flash component density encoding has changed from 3 to 4 bits with Lynx
   Point, currently allowing for up to 64 MB chips.

Corresponding to flashrom svn r1843.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

 - Change check_max_decode() to return the number of (common) busses
   where the flash chip exceeds the supported size of the programmer.
 - Refine its signature to use a flashctx pointer only.
 - Move CLI-related bits to cli_classic.c.
 - Rename check_max_decode() to count_max_decode_exceedings() to
   better reflect what it (now) really does.
 - Refine the messages printed by the caller to better integrate with the new
   setup, and simplify them.

Corresponding to flashrom svn r1842.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Begin to move functions that clearly belong to the (command line)
user interface out of flashrom's core files like flashrom.c.

 - Refine messages within check_chip_supported(), rename it to
   print_chip_support_status() and move it to newly created cli_common.c.
 - Move flashbuses_to_text() to cli_common.c as well.
 - Move global verbosity variables to cli_output.c.

Corresponding to flashrom svn r1841.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Some Parallel bus chips have a 16-bit mode and an 8-bit mode. They use
normal JEDEC addresses for 16-bit mode and shifted addresses (by 1 bit)
for 8-bit mode. Some programmers can access them in 16-bit mode, but on
all flashrom-supported programmers so far, we access them in 8-bit mode.
This means we have to shift the addresses but apart from the addresses
we can share the code.

This patch makes this possible by checking the chip's FEATURE_ADDR_SHIFTED
flag in common JEDEC functions and applying the right addresses respectively.

Corresponding to flashrom svn r1840.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Tested mainboards:
OK:
 - ASUS F2A85-M
   Reported by various corebooters
 - ASUS M2N-MX SE Plus
   Reported by Antonio
 - ASUS P5LD2
   Reported by François Revol
 - Lenovo ThinkPad T530
   Reported and partially authored by Edward O'Callaghan
 - MSI MS-7502 (Medion MD8833)
   Reported by naq on IRC
 - Shuttle AB61
   Reported by olofolleola4
 - ZOTAC IONITX-F-E
   Reported by Bernardo Kuri

Flash chips:
 - Atmel AT45DB021D to PREW (+PREW)
   Reported by The Raven
 - Atmel AT25F4096 to PREW (+PREW)
   Reported by 공준혁
 - GigaDevice GD25Q16(B) to PREW (+PREW)
   Reported by luxflow@live.com using a GD25Q16BSIG
 - Catalyst CAT28F512
   Mark erase and write as known bad (not implemented)

Miscellaneous:
 - Various spelling corrections by Daniele Forsi.
 - Added and refined a bunch of chips originally investigated by Carl-Daniel.
 - Marked the ARM-USB-OCD-H programmer as tested
   (reported by Ruud Schramp).
 - Tiny other stuff.

Corresponding to flashrom svn r1839.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Additionally to the existing S25FL128S......0 definition this patch
adds S25FL128P......0, S25FL128P......1 and S25FL128S......1, as well as
S25FL129P......0 and S25FL129P......1 definitions.
S25FL12xP seem to be the predecessor families of S25FL128S. All
associated chips can not be distinguished with RDID alone.

Besides the new chips, this patch also fixes the name of the  previously
supported S25FL128S model with uniform 256 kB sectors
(S25FL128P......1 not 0) and adds the hybrid sector version (0) as well.

Due to the shared IDs the user has to select the right chip manually
with the -c parameter. To make this even possible, this patch enlarges
the respective array for results to 6.
Tested-by: Antonio Ospite <ao2@ao2.it>
with a S25FL129P......0.

Corresponding to flashrom svn r1838.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Apparently the erase function did never set any address before issuing the
erase commands. How could this ever work?
Also, according to PCH documentation crossing 256 byte boundaries is invalid
and may cause wraparound due to the flash chip's pages. Check for this on
reads as well as writes.

Thanks to Vladimir 'φ-coder/phcoder' Serbinenko for noticing these issues
and providing the initial patch.

Corresponding to flashrom svn r1837.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

For arm64 with 32-bit userspace, pointers such as 0xff96ebf8 were
incorrectly getting converted to u64_t 0xffffffffff96ebf8 in the
spi_ioc_transfer struct which was causing ioctl()s to be rejected by
the kernel. With this patch we first cast to uintptr_t (to avoid
warnings on architectures where char * are not 64b wide) and then to
uint64_t which is always big enough and does not produce warnings.

This patch is taken from ChromiumOS'
Change-Id: I5a15b4ca5d9657c3cb1ddccd42eafd91c852dd26

Corresponding to flashrom svn r1836.
Signed-off-by: David Riley <davidriley@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

29GL chips use a new 3-Byte device ID probing function at addresses
0x01, 0x0E, 0x0F.

Flash chip families supported by this method include...
 - EON EN29GL
 - Gigadevice GD29GL (if they really exist)
 - ISSI (PMC) IS29GL
 - Macronix MX29GL (+MX68GL1G0F)
 - Spansion S29GL (+S70GL02G)
 - Winbond W29GL

This patch adds respective flash chip definitions for chips up to 16 MB from
Eon, ISSI, Macronix and Winbond. Bigger chips as well as those from
Gigadevice and Spansion are left out.

Corresponding to flashrom svn r1835.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Also, slightly refine the definition of AT49LH002.

Corresponding to flashrom svn r1834.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

This includes PMC Pm49*, SST 49LF00*, ST M50* and Winbond W39* families.
The erase and write test status bits of all affected chips have been reset.

Corresponding to flashrom svn r1833.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

This patch lets you read and write the EEPROM on 82580-based gigabit NIC
cards. So far it has been tested on copper NICs only, but other variants
employing this controller should work too.
It is a nice substitution for the official eeupdate tool.

Speed is quite decent: less than 4 seconds for erases or writes of 32 kB.

Corresponding to flashrom svn r1832.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

Register_programmer suggests that we register a programmer. However,
that function registers a master for a given bus type, and a programmer
may support multiple masters (e.g. SPI, FWH). Rename a few other
functions to be more consistent.

Corresponding to flashrom svn r1831.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

SPI controller on the bolton chipset uses the same 3-bit speed
settings as Yangtze, but is otherwise the same as the Hudson chips.
Note that the Bolton RRG doesn't specify a speed setting for the bit
setting of 0b111, so I'm assuming that it's the same setting as
Yangtze.

Corresponding to flashrom svn r1830.
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>