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Flash chips which can be detected by JEDEC probe routines all have
vendor IDs with correct parity. Use a parity check as additional hint
whether a vendor ID makes sense. Note: Device IDs have no parity
requirements whatsoever.

Corresponding to flashrom svn r231 and coreboot v2 svn r3308.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>

The continuation ID code does not go further than checking for IDs of
the type 0x7fXX, but does this for vendor and product ID. The current
published JEDEC spec has a list where the largest vendor ID is 7 bytes
long, but all leading bytes are 0x7f. The list will grow in the future,
and using a 64bit variable will not be enough anymore.
Besides that, it seems that the location of the ID byte after the first
continuation ID byte is very vendor specific, so we may have to revisit
that code some time in the future.

(Suggestion for a new encoding:
Use a two-byte data type for the ID, the lower byte contains the only
non-0x7f byte, the upper byte contains the number of 0x7f bytes used as
prefix, which is the bank number minus 1 the vendor ID appears in.)

Add support for EON EN29F002AT.

Corresponding to flashrom svn r171 and coreboot v2 svn r3030.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>

The JEDEC probe routine had a delay of 10 us after entering ID mode
and this was insufficient for the 29C020. The data sheet claims we
have to wait 10 ms, but tests have shown that 20 us suffice. Allow for
variations in chip delays with a factor of 2 safety margin.

Corresponding to flashrom svn r159 and coreboot v2 svn r2962.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>

Corresponding to flashrom svn r151 and coreboot v2 svn r2873.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

Also minor changes to remove tab-space combinations where possible. 

Corresponding to flashrom svn r144 and coreboot v2 svn r2850.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

Corresponding to flashrom svn r136 and coreboot v2 svn r2768.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

No changes in content of the files.

Corresponding to flashrom svn r131 and coreboot v2 svn r2751.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Corresponding to flashrom svn r130 and coreboot v2 svn r2748.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Corresponding to flashrom svn r128 and coreboot v2 svn r2746.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

Corresponding to flashrom svn r127 and coreboot v2 svn r2745.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

* Give decent names to virt_addr and virt_addr_2
* add some comments
* move virtual addresses to the end of the struct,
  so they dont mess up the initializer.

Corresponding to flashrom svn r111 and coreboot v2 svn r2689.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

  indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch]

Some minor fixups were required, and maybe a few more cosmetic
changes are needed.

Corresponding to flashrom svn r108 and coreboot v2 svn r2643.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Added a check-reprogram loop in the same function, to come around the
high page write failure rate on some boards.

This patch includes the changes suggested by Ron to simplify the control
flow.

It also includes trivial changes by me to make flashrom build on newer
systems (libpci needs libz now). I also made a small type case compile
fix and proper return code handling in one or two places.

Corresponding to flashrom svn r78 and coreboot v2 svn r2505.
Signed-off-by: Giampiero Giancipoli <gianci@email.it>
Signed-off-by: Ronald G Minnich <rminnich@gmail.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

Corresponding to flashrom svn r60 and coreboot v2 svn r2386.

Corresponding to flashrom svn r34 and coreboot v2 svn r2111.

Corresponding to flashrom svn r30 and coreboot v2 svn r1815.

Corresponding to flashrom svn r29 and coreboot v2 svn r1814.

Corresponding to flashrom svn r27 and coreboot v2 svn r1812.

Corresponding to flashrom svn r25 and coreboot v2 svn r1651.

Corresponding to flashrom svn r20 and coreboot v2 svn r1487.

Corresponding to flashrom svn r19 and coreboot v2 svn r1486.

Corresponding to flashrom svn r18 and coreboot v2 svn r1464.

Corresponding to flashrom svn r17 and coreboot v2 svn r1459.

Corresponding to flashrom svn r15 and coreboot v2 svn r1457.

Corresponding to flashrom svn r14 and coreboot v2 svn r1456.

Corresponding to coreboot v1 svn r873.

Corresponding to coreboot v1 svn r752.

Corresponding to coreboot v1 svn r633.

 - switch to volatile everywhere
 - use myusec_delay instead of usleep

Corresponding to coreboot v1 svn r492.

Corresponding to coreboot v1 svn r489.