1. 04 May, 2011 1 commit
  2. 17 Jan, 2011 1 commit
  3. 09 Nov, 2010 1 commit
  4. 01 Nov, 2010 1 commit
    • Carl-Daniel Hailfinger's avatar
      Add SPI flash emulation capability to the dummy programmer · f68aa8ac
      Carl-Daniel Hailfinger authored
      
      You have to choose between
      - no emulation
      - ST M25P10.RES SPI flash chip (RES, page write)
      - SST SST25VF040.REMS SPI flash chip (REMS, byte write)
      - SST SST25VF032B SPI flash chip (RDID, AAI write)
      Example usage: flashrom -p dummy:emulate=SST25VF032B
      
      Flash image persistence is available as well.
      Example usage: flashrom -p dummy:image=dummy_simulator.rom
      
      Allow setting the max chunksize for page write with the dummy
      programmer.
      Example usage: flashrom -p dummy:spi_write_256_chunksize=5
      
      Flash emulation is compiled in by default. 
      
      This code helped me find and fix various bugs in the SPI write code
      as well as in the testsuite.
      
      Corresponding to flashrom svn r1220.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarDavid Hendricks <dhendrix@google.com>
      f68aa8ac
  5. 20 Oct, 2010 1 commit
  6. 19 Oct, 2010 1 commit
    • Carl-Daniel Hailfinger's avatar
      Always read the flash chip before writing · 42d38a9d
      Carl-Daniel Hailfinger authored
      
      This will allow flashrom to skip erase of already-erased blocks and to
      skip write of blocks which already have the wanted contents.
      
      Avoid emergency messages by checking if the chip contents after a failed
      write operation (erase/write) are unchanged.
      
      Keep the emergency messages after a failed pure erase. That part is
      debatable because if someone wants erase, he pretty sure doesn't care
      about the flash contents anymore.
      
      Please note that this introduces additional overhead of a full chip read
      before write. This is frowned upon by people with slow programmers. A
      followup patch will make this configurable.
      
      Corresponding to flashrom svn r1215.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarStefan Reinauer <stepan@coreboot.org>
      42d38a9d
  7. 13 Oct, 2010 1 commit
  8. 08 Oct, 2010 1 commit
  9. 06 Oct, 2010 1 commit
  10. 25 Sep, 2010 1 commit
  11. 29 Jul, 2010 1 commit
  12. 27 Jul, 2010 2 commits
    • Carl-Daniel Hailfinger's avatar
      Split off programmer.h from flash.h · 5b997c3e
      Carl-Daniel Hailfinger authored
      
      Programmer specific functions are of absolutely no interest to any file
      except those dealing with programmer specific actions (special SPI
      commands and the generic core).
      
      The new header structure is as follows (and yes, improvements are
      possible):
      flashchips.h  flash chip IDs
      chipdrivers.h  chip-specific read/write/... functions
      flash.h  common header for all stuff that doesn't fit elsewhere
      hwaccess.h hardware access functions
      programmer.h  programmer specific functions
      coreboot_tables.h  header from coreboot, internal programmer only
      spi.h SPI command definitions
      
      Corresponding to flashrom svn r1112.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarUwe Hermann <uwe@hermann-uwe.de>
      5b997c3e
    • Carl-Daniel Hailfinger's avatar
      Convert MMIO accesses of non-internal PCI-based programmers to be endian-agnostic · 1d3a2fef
      Carl-Daniel Hailfinger authored
      
      Convert all PCI-based external programmers to use special little-endian
      accessors for all MMIO regions of PCI devices. This patch does _not_
      touch the internal programmer (which is PCI-based as well).
      
      Huge thanks go to Misha Manulis who worked with me to create a first
      version of this patch for the satasii programmer based on modification
      of generic code.
      
      Huge thanks also go to Segher Boessenkool for suggesting the pci_mmio_
      prefix for the abstraction layer.
      
      NOTE to package maintainers: With this patch, compilation and usage of
      flashrom should be safe on x86, x86_64, MIPS (little and big endian) and
      PowerPC (big endian).
      
      The internal programmer is disabled on non-x86/x86_64 (but it
      compiles). The atahpt, nic3com, nicnatsemi, nicrealtek and rayer_spi
      can not be compiled on non-x86/x86_64 because port space I/O is
      not (yet) supported. Please compile with default settings on
      x86/x86_64 and with the following settings on all other architectures:
      make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no CONFIG_NICNATSEMI=no
      CONFIG_RAYER_SPI=no
      
      Corresponding to flashrom svn r1111.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarMisha Manulis <misha@manulis.com>
      1d3a2fef
  13. 24 Jul, 2010 1 commit
  14. 22 Jul, 2010 2 commits
  15. 21 Jul, 2010 1 commit
  16. 18 Jul, 2010 1 commit
  17. 17 Jul, 2010 2 commits
  18. 14 Jul, 2010 2 commits
  19. 13 Jul, 2010 1 commit
  20. 10 Jul, 2010 1 commit
  21. 08 Jul, 2010 1 commit
  22. 06 Jul, 2010 1 commit
  23. 03 Jul, 2010 2 commits
  24. 20 Jun, 2010 1 commit
  25. 07 Jun, 2010 3 commits
  26. 04 Jun, 2010 2 commits
  27. 03 Jun, 2010 1 commit
  28. 01 Jun, 2010 1 commit
  29. 31 May, 2010 1 commit
  30. 30 May, 2010 1 commit
  31. 28 May, 2010 1 commit
  32. 26 May, 2010 1 commit
    • Carl-Daniel Hailfinger's avatar
      Handle the following architectures in generic flashrom code · cceafa2a
      Carl-Daniel Hailfinger authored
      
      - x86/x86_64 (little endian)
      - PowerPC (big endian)
      - MIPS (big+little endian)
      
      No changes to programmer specific code. This means any drivers with MMIO
      access will _not_ suddenly start working on big endian systems, but with
      this patch everything is in place to fix them.
      
      Compilation should work on all architectures listed above for all
      drivers except nic3com and nicrealtek which require PCI Port IO which is
      x86-only for now.
      
      To compile without nic3com and nicrealtek, run
      make distclean
      make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no
      
      Thanks to Misha Manulis for testing early versions of this patch on
      PowerPC (big endian) with the satasii programmer.
      Thanks to Segher Boessenkool for design review and for helping out with
      compiler tricks and pointing out that we need eieio on PowerPC.
      Thanks to Vladimir Serbinenko for compile testing on MIPS (little
      endian) and PowerPC (big endian) and for runtime testing on MIPS (little
      endian).
      Thanks to David Daney for compile testing on MIPS (big endian).
      Thanks to Uwe Hermann for compile and runtime testing on x86_64.
      
      DO NOT RUN flashrom ON NON-X86 AFTER APPLYING THIS PATCH!
      This patch only provides the infrastructure, but does not convert any
      drivers, so flashrom will compile, but it won't do the right thing on
      non-x86 platforms.
      
      Corresponding to flashrom svn r1013.
      Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
      Acked-by: default avatarMisha Manulis <misha@manulis.com>
      Acked-by: default avatarVladimir 'phcoder/φ-coder' Serbinenko <phcoder@gmail.com>
      Acked-by: default avatarUwe Hermann <uwe@hermann-uwe.de>
      Acked-by: default avatarSegher Boessenkool <segher@kernel.crashing.org>
      cceafa2a