GitLab

Some MMIO accesses used volatile, others didn't (and risked
non-execution of side effects) and even with volatile, some accesses
looked dubious.

Since the MMIO accessor functions and the onboard flash accessor
functions are functionally identical (but have different signatures),
make the flash accessors wrappers for the MMIO accessors.

For some of the conversions, I used Coccinelle. Semantic patch follows:

@@ typedef uint8_t; expression a; volatile uint8_t *b; @@ - b[a] + *(b
+ a) @@ expression a; volatile uint8_t *b; @@ - *(b) |= (a); + *(b) =
*(b) | (a); @@ expression a; volatile uint8_t *b; @@ - *(b) = (a); +
mmio_writeb(a, b); @@ volatile uint8_t *b; @@ - *(b) + mmio_readb(b) @@
type T; T b; @@ ( mmio_readb | mmio_writeb ) (..., - (T) - (b) + b )

Corresponding to flashrom svn r524.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Uwe tested read, write, erase with this patch on a random board to make
sure nothing breaks.
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

 - Supported out of the box (no flash enables required)

 - Verifiably not yet working (unknown flash enable)

Also, move some structs to flash.h in preparation for later wiki
output support.

Corresponding to flashrom svn r523.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

They serve pretty much no purpose, compilers can optimize pretty much
all of what we might mark as inline anyway, _and_ inlines are not
enforced in any way by the compiler either. They're totally unneeded.
Kill them.

Corresponding to flashrom svn r522.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Build-tested on 32bit x86.

Corresponding to flashrom svn r521.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

This is tested on hardware.

Also, add initial support for the Atmel AT29C010A chip (which I inserted
in a 3COM 3C90xB card for testing). It can be detected, read works,
erase works, but write will need some additional code (will post in
another patch later).

Corresponding to flashrom svn r520.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Use chipaddr instead of volatile uint8_t * because when we access chips
in external flashers, they are not accessed via pointers at all.

Benefits: This allows us to differentiate between volatile machine
memory accesses and flash chip accesses. It also enforces usage
of chip_{read,write}[bwl] to access flash chips, so nobody will
unintentionally use pointers to access chips anymore. Some unneeded
casts are removed as well. Grepping for chip operations and machine
memory operations doesn't yield any false positives anymore.

Compile tested on 32 bit and 64 bit Linux.

Corresponding to flashrom svn r519.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

2.2.8, as it's default on current FreeBSD 7.2) don't properly fill
the base_addr[0] struct member, so revert back to an explicit
pci_read_long() call, otherwise detection of PCI devices and their base
address will fail with strange error messages.

Thanks Idwer Vollering <vidwer@gmail.com> for reporting and testing.

Corresponding to flashrom svn r518.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

The emulation works by splitting 32 bit accesses into 16 bit accesses
and 16 bit accesses into to 8 bit accesses. That way, external flashers
can mix and match the amount of emulation they need.

Corresponding to flashrom svn r517.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

It seems some boards do not use SPI_HOLD at all. Take that into account
when trying to figure out if SPI is available.

Print the SB600 ROM strap override register status for better debugging.

Corresponding to flashrom svn r516.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Move the reusable PCI specific parts into pcidev.c, they'll be usable
for other NIC code (Realtek, VIA, ...) and also for SATA/IDE controller
cards as external programmers (for every PCI device which can program
EEPROMs basically).

Also add print_supported_pcidevs() to show the supported PCI devices
(currently only NICs, soon more) in the 'flashrom -L' output.

Corresponding to flashrom svn r515.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Until the ICH SPI driver can handle preopcodes as standalone opcodes,
we should handle such special opcode failure gracefully on ICH and
compatible chipsets.

This fixes status register writes on almost all ICH+VIA SPI masters.

The fix is almost identical to r484, but this time it affects the EWSR
(Enable Write Status Register) opcode instead of the WREN (Write Enable)
opcode.

With the differentiated return codes introduced in r500, the workaround
is more precise this time. The old WREN workaround was updated as well.

Corresponding to flashrom svn r514.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
Acked-by: Cristi Magherusan <cristi.magherusan@net.utcluj.ro>

If we find multiple ones, abort with a message to the user, suggesting
to use the

  flashrom -p nic3com=bb:dd.f

syntax. If exactly one supported NIC is found, use it. If none is found,
abort with an error.

Print the bb:dd.f numbers for all supported NICs we find, so the user
doesn't have to poke around in lspci output to find the desired bb:dd.f.

Also, drop one pci_read_long() in favor of using the already existing
base_addr[0] struct field.

Drop the BAR in user messages, it's not really useful for us. Instead,
explain the BDF syntax a bit more verbosely.

While I'm at it, update the manpage some more to mention and fully
document the external programmer support we have (or will have soon).

The patch is tested on hardware:

$ flashrom -p nic3com flashrom v0.9.0-r512 Found NIC "3COM 3C905C:
EtherLink 10/100 PCI (TX)" (10b7:9200, BDF 05:04.0) Found NIC "3COM
3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200, BDF 05:03.0) Error:
Multiple supported NICs found. Please use 'flashrom -p nic3com=bb:dd.f'
to explicitly select the card with the given BDF (PCI bus, device,
function).

$ flashrom -p nic3com=05:04.0 flashrom v0.9.0-r512 Found NIC "3COM
3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200, BDF 05:04.0) Calibrating
delay loop... OK. Found chip "Atmel AT49BV512" (64 KB) at physical
address 0xffff0000. No operations were specified.

Corresponding to flashrom svn r513.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Corresponding to flashrom svn r512.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Factor out portable iopl()-style code into a global function which all
programmers can use, add missing close() call.

Corresponding to flashrom svn r511.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Add support for users to specify a certain NIC via PCI bus:slot.func
notation, in case there are multiple NICs in one system.

Usage: flashrom -p nic3com=bb:ss.f

Corresponding to flashrom svn r510.
Signed-off-by: Christian Ruppert <spooky85@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Build-tested and 'make PREFIX=/tmp/foo install' tested by me.

Corresponding to flashrom svn r509.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Corresponding to flashrom svn r508.
Signed-off-by: Christian Ruppert <spooky85@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Does not support reading or writing the fake chip yet.

flashrom --programmer dummy
also enables the dummy SPI controller driver.

Testing the dummy SPI driver revealed a RDID debug printing bug in the
SPI core. Fix that as well.

Corresponding to flashrom svn r507.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Author: raijin

Corresponding to flashrom svn r506.
Signed-off-by: Daniel McLellan <daniel.mclellan@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>

Even if we don't tell the user about the areas the block locking bits
correspond to, printing a detailed list of which lock bits are set is a
definite improvement.

Corresponding to flashrom svn r505.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Sample output:
[...]
Probing for SST SST25VF032B, 4096 KB: RDID returned bf 25 4a.
probe_spi_rdid_generic: id1 0xbf, id2 0x254a
Chip status register is 1c
Chip status register: Block Protect Write Disable (BPL) is not set
Chip status register: Auto Address Increment Programming (AAI) is not
set
Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
Chip status register: Bit 4 / Block Protect 2 (BP2) is set
Chip status register: Bit 3 / Block Protect 1 (BP1) is set
Chip status register: Bit 2 / Block Protect 0 (BP0) is set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
Found chip "SST SST25VF032B" (4096 KB) at physical address 0xffc00000.
Acked-by: Cristi Magherusan <cristi.magherusan@net.utcluj.ro>

Downgrade the chips from 256-byte writes to 1-byte writes. This fixes
writing to them on ICH/VIA SPI masters.

Corresponding to flashrom svn r504.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>

Thanks to Mateusz for testing and reporting!

Corresponding to flashrom svn r503.
Signed-off-by: Mateusz Murawski <matowy@tlen.pl>
Acked-by: Peter Stuge <peter@stuge.se>

Tested with 3COM 3C905C: EtherLink 10/100 PCI (TX)
http://www.coreboot.org/pipermail/coreboot/2009-May/048163.html



Corresponding to flashrom svn r502.
Signed-off-by: Mateusz Murawski <matowy@tlen.pl>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Corresponding to flashrom svn r501.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Among others, I have seen the following problems: - The SPI opcode is
not supported by the controller. ICH-style controllers exhibit this if
SPI config is locked down. - The address in in a prohibited area. This
can happen on ICH for any access (BBAR) and for writes in chipset write
protected areas. - There is no SPI controller.

Introduce separate error codes for unsupported opcode and prohibited
address.

Add the ability to adjust REMS and RES addresses to the minium supported
read address with the help of spi_get_valid_read_addr(). That function
needs to call SPI controller specific functions like reading BBAR on
ICH.

Corresponding to flashrom svn r500.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

This allows flashrom to identify, read, write, erase and verify flash chips
on (some) 3COM network cards. The patch uses the external programmer
infrastructure, the network card is basically treated as an external
flash programmer.

Usage:

$ ./flashrom -p nic3com
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
No operations were specified.

$ ./flashrom -p nic3com -E
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
Erasing flash chip... SUCCESS.

$ ./flashrom -p nic3com -wv backup.bin
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
Flash image seems to be a legacy BIOS. Disabling checks.
Programming page: 1023 at address: 0x0000ffc0
Verifying flash... VERIFIED.

$ ./flashrom -p nic3com -r backup.bin
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
Reading flash... done.

I have tested this on actual hardware (see PCI IDs above) and all
operations worked fine.

Support for other 3COM cards will follow (I added some more which should
be supportable by this code, but they're untested so far), as well as
support for NICs from other vendors.

The patch also adds support for the Atmel AT49BV512 which is soldered
onto the 3COM NIC I used for testing.

Corresponding to flashrom svn r499.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Mateusz Murawski <matowy@tlen.pl>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

The semantic patch I used in r418 to make the original conversion to
accessor functions was missing one isomorphism:
a[b] <=> *(a+b)

The semantic patcher Coccinelle was used to create this patch. Semantic
patch follows:
@@
typedef uint8_t;
expression a;
volatile uint8_t *b;
@@
- b[a]
+ *(b + a)
@@
expression a;
volatile uint8_t *b;
@@
- *(b) = (a);
+ chip_writeb(a, b);
@@
volatile uint8_t *b;
@@
- *(b)
+ chip_readb(b)
@@
type T;
T b;
@@
(
 chip_readb
|
 chip_writeb
)
 (...,
- (T)
- (b)
+ b
 )

Corresponding to flashrom svn r498.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

The write_39sf020() and write_49f002() functions are identical except
for whitespace differences, so drop one of them.

Corresponding to flashrom svn r497.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

All other chips call it wrprotect which is less confusing. As a side
benefit, flash_addr is now a name usable for other stuff.

Corresponding to flashrom svn r496.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>

Print the return value of dummy_chip_read[bwl].
Align entries in programmer_table.

This is a cosmetic patch and has no effect on code flow.

Corresponding to flashrom svn r495.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>

When flashrom JEDEC code sends the ID command to the chip, it expects to
see IDs in the default flash location.

However, sometimes the chip does not react to the ID command, either
because it doesn't understand the command or because the command never
reached it. One way to detect this is to compare ID output with flash
chip contents for the same location. If they are identical, there is a
high chance you're not actually seeing ID output. Warn the user in that
case.

This patch helps a lot when a chip is not recognized and we want to
check if the probe responses are real IDs or just random flash chip
contents.

This should probably be added to all probe functions, but probe_jedec
is called for all sizes and thus flashrom will check this condition at
least once per size, making sure we can cross-match the warning.

Corresponding to flashrom svn r494.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>

Flash mapping/unmapping was performed without an abstraction layer,
so even the dummy flasher caused memory mappings to be set up. Add
map/unmap functions to the external flasher abstraction.

Fix a possible scribble-over-low-memory corner case which fortunately
never triggered so far.

With this patch, --programmer dummy works fine as non-root.

Corresponding to flashrom svn r493.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Add lock bit handling (printing, setting and checking) to SST FWH chips
and abort any writes to locked sectors. Verbose mode gives you all the
info. Normal mode only tells you of unlocking failed, but gives enough
details to debug.

Add a comment about flash register placement to flashrom.c.

Thanks to Uwe for testing multiple iterations of this patch.

Corresponding to flashrom svn r492.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

I know that the data sheets say we can't read the ROM straps, but
creative interpretation of the data sheets yielded a heuristic which
should work pretty well.

NOTE: If you test this, make sure you power down and _unplug_ the
machine for a few minutes before you boot and run flashrom with this
patch.
If the machine is not unplugged for some time, the test will yield
incorrect results.
If you run a slightly older flashrom version than svn HEAD, the test
will yield incorrect results.
If you run any flashrom version (except svn HEAD plus this patch) after
poweron, the test will yield incorrect results.

Explanation:
Older flashrom versions unconditionally write to registers which are
used for this heuristic. These registers are in the S5 power domain, so
even powering down does not clear them, you really have to unplug the
machine and remove the battery if this is a laptop.

Corresponding to flashrom svn r491.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

Corresponding to flashrom svn r490.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Corresponding to flashrom svn r489.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Flashbase is a variable which should never be set outside chipset code.
It is only used to calculate the base address of the flash space at
exactly one location in the code.

Setting flashbase during probe caused subsequent probes to fail unless
special handling code was used. We had such code and it caused every
probe except the first to fail on Elan SC520.

Remove the superfluous flashbase assignment and simplify the rest of the
code.

Corresponding to flashrom svn r488.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>

Since many commands take around 10 microseconds to complete, it is
totally pointless to wait for 1000 microseconds before checking the
status again.

This patch is tested and reduced write time on ICH7 with SST25VF080B
from over one hour to 62 seconds.

Thanks to Ali Nadalizadeh for testing!

Corresponding to flashrom svn r487.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Myles Watson <mylesgw@gmail.com>

Change the flashchips entry for SST SST25VF080B to 1-byte writing.

Tested-by: Ali Nadalizadeh.

Corresponding to flashrom svn r486.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Change SPI architecture to handle 1-byte chunk chip writing differently
from 256-byte chunk chip writing.

Annotate SPI chip write functions with _256 or _1 suffix denoting the
number of bytes they write at maximum.

The 1-byte chunk writing is cut-n-pasted to different SPI drivers right
now. A later patch can move them to the generic spi_chip_write_1.

Corresponding to flashrom svn r485.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>