GitLab

Corresponding to flashrom svn r276 and coreboot v2 svn r3390.
Signed-off-by: Jens Kühnel <coreboot@jens.kuehnel.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Per test report from Alex Perez. Thanks Alex!

Corresponding to flashrom svn r275 and coreboot v2 svn r3389.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>

Per test report from Andrew Paprocki. Thanks Andrew!

Corresponding to flashrom svn r274 and coreboot v2 svn r3388.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>

DOC support has been disabled by default for many years. The write function
does nothing but print text. It has a call to write_page_md2802() commented
out, but that function does not exist. This is dead code with ugly #ifdefs.

Updates README to reflect that there was a time when there was code, but it
didn't work. Removes M-Systems #defines and also includes svn rm msys_doc.*

Corresponding to flashrom svn r269 and coreboot v2 svn r3382.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

Many thanks to Julio Cesar Costa for the test report!

Corresponding to flashrom svn r268 and coreboot v2 svn r3379.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>

Corresponding to flashrom svn r265 and coreboot v2 svn r3376.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>

Thanks to Urja Rannikko for reporting test results with these flash chips.

Corresponding to flashrom svn r263 and coreboot v2 svn r3374.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>

Jens sent the first patch that added A49LF040A to flash.h and flashchips.c
using _jedec and _49lf040 functions.

An issue was found with probe_w29ee011() for the Winbond W29EE011, which
caused the A49LF040A to no longer respond to any commands.

Ward made a patch to disable probing by default for the W29EE011 following
some discussion. Using -c W29EE011 will make flashrom probe for the chip.

Peter did some more datasheet diving and found that the Pm49FL00x functions
suited this chip quite well because of the block locking registers in
A49LF040A, and finally tested PROBE READ ERASE WRITE to work on ALIX.3c3.

Ward confirmed that this works on alix.2c3 too.

Corresponding to flashrom svn r260 and coreboot v2 svn r3368.
Signed-off-by: Jens Kuehnel <coreboot@jens.kuehnel.org>
Signed-off-by: Ward Vandewege <ward@gnu.org>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>

PROBE READ tested by Lyos Gemini Norezel on BioStar P4M80-M4.

Corresponding to flashrom svn r257 and coreboot v2 svn r3365.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com>

SST SST49LF160C is confirmed to work for PROBE READ ERASE WRITE, at least on
2 MCP55-based boards (gigabyte m57sli v1 and supermicro h8dmr).

On the m57sli board, it only works > 512K when booted into coreboot; the
proprietary bios seems to do something weird where it locks rom access down
to the first 512K of the chip.

Corresponding to flashrom svn r255 and coreboot v2 svn r3360.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>

Corresponding to flashrom svn r254 and coreboot v2 svn r3358.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>

Corresponding to flashrom svn r253 and coreboot v2 svn r3357.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>

I have tested MX25L4005, S25FL016A and W39V080A myself.

Thanks also to the following testers:
SST49LF008A Bernhard M. Wiedemann
W39V040B Dan Lenski

Corresponding to flashrom svn r252 and coreboot v2 svn r3356.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>

Tested by me on actual hardware (all operations) - Artec Group DBE62
with SST 49LF004B

Corresponding to flashrom svn r251 and coreboot v2 svn r3350.
Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>

  - AMD Am29F040B
  - SST SST39SF020A
  - Winbond W29C020C
  - Winbond W29EE011
  - Winbond W49F002U

All of them tested by me on actual hardware (all operations).

Corresponding to flashrom svn r250 and coreboot v2 svn r3349.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Corresponding to flashrom svn r248 and coreboot v2 svn r3347.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Corresponding to flashrom svn r246 and coreboot v2 svn r3345.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Corresponding to flashrom svn r244 and coreboot v2 svn r3341.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>

The PMC chips understand both LPC and FWH flash commands. When in FWH mode
(MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block
Locking Registers by default lock the flash chip for write and erase - in
addition to any chipset write protection.

This patch adds unlock operations before Pm49FL004/2 write and erase, and
it includes an svn mv pm49fl004.c pm49fl00x.c

Thanks go to Nikolay for this patch.

Corresponding to flashrom svn r243 and coreboot v2 svn r3332.
Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Bari Ari <bari@onelabs.com>

Change ST M25P32 status to tested.

Corresponding to flashrom svn r240 and coreboot v2 svn r3326.
Signed-off-by: Dominik Geyer <dominik.geyer@kontron.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Only a subset has been added to flashchips.c, but the IDs in flash.h
will make lookups easier if anybody wants to add support for them.

Corresponding to flashrom svn r236 and coreboot v2 svn r3321.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Add support for the JEDEC RES (Read Electronic Signature and Resume from
Powerdown) SPI command to identify older SPI chips which can't handle
JEDEC RDID.

Since RES gives a one-byte identifier which is shared among many
different vendors and even different sizes, we want to match RES as a
last resort if RDID returns 0xff 0xff 0xff.

Corresponding to flashrom svn r235 and coreboot v2 svn r3320.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>

This is a heavily reworked version of a patch by Fredrik Tolf, which was
Signed-off-by: Fredrik Tolf <fredrik@dolda2000.com>

Corresponding to flashrom svn r232 and coreboot v2 svn r3309.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Add a few flashchips already mentioned in flash.h to flashchips.c

Corresponding to flashrom svn r230 and coreboot v2 svn r3306.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

SST39VF040 has been confirmed to probe OK by misi e.

Corresponding to flashrom svn r226 and coreboot v2 svn r3300.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

The SST39LF series has the same IDs. Add short AMIC vendor ID to
flashrom.

Corresponding to flashrom svn r225 and coreboot v2 svn r3299.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>

This is a very early step toward cleaning up SPI code in flashrom.

Corresponding to flashrom svn r223 and coreboot v2 svn r3295.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Two bits indicate OK and BAD for each operation PROBE READ ERASE WRITE.
8 bits out of 32 are in use now. No bits set means nothing has been tested.
For chips with at least one operation that is not tested or not working, the
user is asked to email a report to a special email adress so that the table
can be updated.

All chips are TEST_UNTESTED for now.

Corresponding to flashrom svn r221 and coreboot v2 svn r3277.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

The generic jedec.c does not work for the ST M50FLW flash devices,
because they need an unlock command first. For this reason, ST M50FLW
support is moved to a new HW support module, because any change in
jedec.c would bear the risk to cause problems with the already supported
devices.

It's already tested with ST M50FLW080A; the other chips of this family i
dont have available, so i couldnt test it.

Corresponding to flashrom svn r219 and coreboot v2 svn r3274.
Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

Corresponding to flashrom svn r216 and coreboot v2 svn r3221.
Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Joseph Smith <joe@smittys.pointclark.net>

Support for flashing on the Kontron 986LCD-M board.

Corresponding to flashrom svn r213 and coreboot v2 svn r3165.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Corresponding to flashrom svn r211 and coreboot v2 svn r3152.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Corresponding to flashrom svn r209 and coreboot v2 svn r3146.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

This fixes the problem of not being able to erase the chip.

Corresponding to flashrom svn r208 and coreboot v2 svn r3145.
Signed-off-by: Joseph Smith <joe@smittys.pointclark.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Corresponding to flashrom svn r205 and coreboot v2 svn r3141.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Corresponding to flashrom svn r204 and coreboot v2 svn r3140.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

Cosmetic changes in some files, partly bending the 80-characters-per-line
rule in this special case, as the 80-character-limited version looks
equally crappy even in an 80x25 console/xterm, so let's make it at least
look good in a high-resolution xterm.

Corresponding to flashrom svn r203 and coreboot v2 svn r3139.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Corresponding to flashrom svn r201 and coreboot v2 svn r3137.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>

Some vendors like Programmable Micro Corp (PMC) need this. Both the
serial and parallel flash JEDEC detection routines would benefit from a
parity/sanity check of the vendor ID. Will do this later.

Add support for the PMC Pm25LV family of SPI flash chips.

Corresponding to flashrom svn r191 and coreboot v2 svn r3091.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Chris Lingard  <chris@stockwith.co.uk>

Corresponding to flashrom svn r187 and coreboot v2 svn r3074.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>