Rename programmer registration functions

Register_programmer suggests that we register a programmer. However,
that function registers a master for a given bus type, and a programmer
may support multiple masters (e.g. SPI, FWH). Rename a few other
functions to be more consistent.

Corresponding to flashrom svn r1831.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

at45db.c

@@ -241,7 +241,7 @@ int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int addr, uns
 
 	/* We have to split this up into chunks to fit within the programmer's read size limit, but those
 	 * chunks can cross page boundaries. */
-	const unsigned int max_data_read = flash->pgm->spi.max_data_read;
+	const unsigned int max_data_read = flash->mst->spi.max_data_read;
 	const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size;
 	while (len > 0) {
 		unsigned int chunk = min(max_chunk, len);
@@ -272,7 +272,7 @@ int spi_read_at45db_e8(struct flashctx *flash, uint8_t *buf, unsigned int addr,
 
 	/* We have to split this up into chunks to fit within the programmer's read size limit, but those
 	 * chunks can cross page boundaries. */
-	const unsigned int max_data_read = flash->pgm->spi.max_data_read;
+	const unsigned int max_data_read = flash->mst->spi.max_data_read;
 	const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size;
 	while (len > 0) {
 		const unsigned int addr_at45 = at45db_convert_addr(addr, page_size);
@@ -463,7 +463,7 @@ static int at45db_fill_buffer1(struct flashctx *flash, const uint8_t *bytes, uns
 	}
 
 	/* Create a suitable buffer to store opcode, address and data chunks for buffer1. */
-	const unsigned int max_data_write = flash->pgm->spi.max_data_write;
+	const unsigned int max_data_write = flash->mst->spi.max_data_write;
 	const unsigned int max_chunk = (max_data_write > 0 && max_data_write <= page_size) ?
 				       max_data_write : page_size;
 	uint8_t buf[4 + max_chunk];

atahpt.c

@@ -47,7 +47,7 @@ static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
 			       chipaddr addr);
 static uint8_t atahpt_chip_readb(const struct flashctx *flash,
 				 const chipaddr addr);
-static const struct par_programmer par_programmer_atahpt = {
+static const struct par_master par_master_atahpt = {
 		.chip_readb		= atahpt_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -79,7 +79,7 @@ int atahpt_init(void)
 	reg32 |= (1 << 24);
 	rpci_write_long(dev, REG_FLASH_ACCESS, reg32);
 
-	register_par_programmer(&par_programmer_atahpt, BUS_PARALLEL);
+	register_par_master(&par_master_atahpt, BUS_PARALLEL);
 
 	return 0;
 }

atavia.c

@@ -60,7 +60,7 @@ const struct dev_entry ata_via[] = {
 
 static void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
 static uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr);
-static const struct par_programmer lpc_programmer_atavia = {
+static const struct par_master lpc_master_atavia = {
 		.chip_readb		= atavia_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -164,7 +164,7 @@ int atavia_init(void)
 		return 1;
 	}
 
-	register_par_programmer(&lpc_programmer_atavia, BUS_LPC);
+	register_par_master(&lpc_master_atavia, BUS_LPC);
 
 	return 0;
 }

bitbang_spi.c

@@ -63,7 +63,7 @@ static int bitbang_spi_send_command(struct flashctx *flash,
 				    const unsigned char *writearr,
 				    unsigned char *readarr);
 
-static const struct spi_programmer spi_programmer_bitbang = {
+static const struct spi_master spi_master_bitbang = {
 	.type		= SPI_CONTROLLER_BITBANG,
 	.max_data_read	= MAX_DATA_READ_UNLIMITED,
 	.max_data_write	= MAX_DATA_WRITE_UNLIMITED,
@@ -82,9 +82,9 @@ static int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
 }
 #endif
 
-int bitbang_spi_init(const struct bitbang_spi_master *master)
+int register_spi_bitbang_master(const struct bitbang_spi_master *master)
 {
-	struct spi_programmer pgm = spi_programmer_bitbang;
+	struct spi_master mst = spi_master_bitbang;
 	/* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type,
 	 * we catch it here. Same goes for missing initialization of bitbanging
 	 * functions.
@@ -98,8 +98,8 @@ int bitbang_spi_init(const struct bitbang_spi_master *master)
 		return ERROR_FLASHROM_BUG;
 	}
 
-	pgm.data = master;
-	register_spi_programmer(&pgm);
+	mst.data = master;
+	register_spi_master(&mst);
 
 	/* Only mess with the bus if we're sure nobody else uses it. */
 	bitbang_spi_request_bus(master);
@@ -137,7 +137,7 @@ static int bitbang_spi_send_command(struct flashctx *flash,
 				    unsigned char *readarr)
 {
 	int i;
-	const struct bitbang_spi_master *master = flash->pgm->spi.data;
+	const struct bitbang_spi_master *master = flash->mst->spi.data;
 
 	/* FIXME: Run bitbang_spi_request_bus here or in programmer init?
 	 * Requesting and releasing the SPI bus is handled in here to allow the

buspirate_spi.c

@@ -134,7 +134,7 @@ static int buspirate_spi_send_command_v1(struct flashctx *flash, unsigned int wr
 static int buspirate_spi_send_command_v2(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
 					 const unsigned char *writearr, unsigned char *readarr);
 
-static struct spi_programmer spi_programmer_buspirate = {
+static struct spi_master spi_master_buspirate = {
 	.type		= SPI_CONTROLLER_BUSPIRATE,
 	.max_data_read	= MAX_DATA_UNSPECIFIED,
 	.max_data_write	= MAX_DATA_UNSPECIFIED,
@@ -355,9 +355,9 @@ int buspirate_spi_init(void)
 		/* Sensible default buffer size. */
 		if (buspirate_commbuf_grow(260 + 5))
 			return ERROR_OOM;
-		spi_programmer_buspirate.max_data_read = 2048;
-		spi_programmer_buspirate.max_data_write = 256;
-		spi_programmer_buspirate.command = buspirate_spi_send_command_v2;
+		spi_master_buspirate.max_data_read = 2048;
+		spi_master_buspirate.max_data_write = 256;
+		spi_master_buspirate.command = buspirate_spi_send_command_v2;
 	} else {
 		msg_pinfo("Bus Pirate firmware 5.4 and older does not support fast SPI access.\n");
 		msg_pinfo("Reading/writing a flash chip may take hours.\n");
@@ -365,9 +365,9 @@ int buspirate_spi_init(void)
 		/* Sensible default buffer size. */
 		if (buspirate_commbuf_grow(16 + 3))
 			return ERROR_OOM;
-		spi_programmer_buspirate.max_data_read = 12;
-		spi_programmer_buspirate.max_data_write = 12;
-		spi_programmer_buspirate.command = buspirate_spi_send_command_v1;
+		spi_master_buspirate.max_data_read = 12;
+		spi_master_buspirate.max_data_write = 12;
+		spi_master_buspirate.command = buspirate_spi_send_command_v1;
 	}
 
 	/* Workaround for broken speed settings in firmware 6.1 and older. */
@@ -454,7 +454,7 @@ int buspirate_spi_init(void)
 		return 1;
 	}
 
-	register_spi_programmer(&spi_programmer_buspirate);
+	register_spi_master(&spi_master_buspirate);
 
 	return 0;
 }

cli_classic.c

@@ -426,10 +426,10 @@ int main(int argc, char *argv[])
 	msg_pdbg("The following protocols are supported: %s.\n", tempstr);
 	free(tempstr);
 
-	for (j = 0; j < registered_programmer_count; j++) {
+	for (j = 0; j < registered_master_count; j++) {
 		startchip = 0;
 		while (chipcount < ARRAY_SIZE(flashes)) {
-			startchip = probe_flash(&registered_programmers[j], startchip, &flashes[chipcount], 0);
+			startchip = probe_flash(&registered_masters[j], startchip, &flashes[chipcount], 0);
 			if (startchip == -1)
 				break;
 			chipcount++;
@@ -452,27 +452,27 @@ int main(int argc, char *argv[])
 				  "automatically.\n");
 		}
 		if (force && read_it && chip_to_probe) {
-			struct registered_programmer *pgm;
-			int compatible_programmers = 0;
+			struct registered_master *mst;
+			int compatible_masters = 0;
 			msg_cinfo("Force read (-f -r -c) requested, pretending the chip is there:\n");
 			/* This loop just counts compatible controllers. */
-			for (j = 0; j < registered_programmer_count; j++) {
-				pgm = &registered_programmers[j];
+			for (j = 0; j < registered_master_count; j++) {
+				mst = &registered_masters[j];
 				/* chip is still set from the chip_to_probe earlier in this function. */
-				if (pgm->buses_supported & chip->bustype)
-					compatible_programmers++;
+				if (mst->buses_supported & chip->bustype)
+					compatible_masters++;
 			}
-			if (!compatible_programmers) {
+			if (!compatible_masters) {
 				msg_cinfo("No compatible controller found for the requested flash chip.\n");
 				ret = 1;
 				goto out_shutdown;
 			}
-			if (compatible_programmers > 1)
+			if (compatible_masters > 1)
 				msg_cinfo("More than one compatible controller found for the requested flash "
 					  "chip, using the first one.\n");
-			for (j = 0; j < registered_programmer_count; j++) {
-				pgm = &registered_programmers[j];
-				startchip = probe_flash(pgm, 0, &flashes[0], 1);
+			for (j = 0; j < registered_master_count; j++) {
+				mst = &registered_masters[j];
+				startchip = probe_flash(mst, 0, &flashes[0], 1);
 				if (startchip != -1)
 					break;
 			}
@@ -502,7 +502,7 @@ int main(int argc, char *argv[])
 	check_chip_supported(fill_flash->chip);
 
 	size = fill_flash->chip->total_size * 1024;
-	if (check_max_decode(fill_flash->pgm->buses_supported & fill_flash->chip->bustype, size) && (!force)) {
+	if (check_max_decode(fill_flash->mst->buses_supported & fill_flash->chip->bustype, size) && (!force)) {
 		msg_cerr("Chip is too big for this programmer (-V gives details). Use --force to override.\n");
 		ret = 1;
 		goto out_shutdown;

dediprog.c

@@ -750,7 +750,7 @@ static int dediprog_setup(long target)
 	return 0;
 }
 
-static const struct spi_programmer spi_programmer_dediprog = {
+static const struct spi_master spi_master_dediprog = {
 	.type		= SPI_CONTROLLER_DEDIPROG,
 	.max_data_read	= MAX_DATA_UNSPECIFIED,
 	.max_data_write	= MAX_DATA_UNSPECIFIED,
@@ -929,7 +929,7 @@ int dediprog_init(void)
 		return 1;
 	}
 
-	register_spi_programmer(&spi_programmer_dediprog);
+	register_spi_master(&spi_master_dediprog);
 
 	/* RE leftover, leave in until the driver is complete. */
 #if 0

drkaiser.c

@@ -45,7 +45,7 @@ static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
 				 chipaddr addr);
 static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
 				   const chipaddr addr);
-static const struct par_programmer par_programmer_drkaiser = {
+static const struct par_master par_master_drkaiser = {
 		.chip_readb		= drkaiser_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -81,7 +81,7 @@ int drkaiser_init(void)
 		return 1;
 
 	max_rom_decode.parallel = 128 * 1024;
-	register_par_programmer(&par_programmer_drkaiser, BUS_PARALLEL);
+	register_par_master(&par_master_drkaiser, BUS_PARALLEL);
 
 	return 0;
 }

dummyflasher.c

@@ -109,7 +109,7 @@ static uint16_t dummy_chip_readw(const struct flashctx *flash, const chipaddr ad
 static uint32_t dummy_chip_readl(const struct flashctx *flash, const chipaddr addr);
 static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
 
-static const struct spi_programmer spi_programmer_dummyflasher = {
+static const struct spi_master spi_master_dummyflasher = {
 	.type		= SPI_CONTROLLER_DUMMY,
 	.max_data_read	= MAX_DATA_READ_UNLIMITED,
 	.max_data_write	= MAX_DATA_UNSPECIFIED,
@@ -120,7 +120,7 @@ static const struct spi_programmer spi_programmer_dummyflasher = {
 	.write_aai	= default_spi_write_aai,
 };
 
-static const struct par_programmer par_programmer_dummy = {
+static const struct par_master par_master_dummy = {
 		.chip_readb		= dummy_chip_readb,
 		.chip_readw		= dummy_chip_readw,
 		.chip_readl		= dummy_chip_readl,
@@ -395,12 +395,10 @@ dummy_init_out:
 		return 1;
 	}
 	if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH))
-		register_par_programmer(&par_programmer_dummy,
-					dummy_buses_supported &
-						(BUS_PARALLEL | BUS_LPC |
-						 BUS_FWH));
+		register_par_master(&par_master_dummy,
+				    dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH));
 	if (dummy_buses_supported & BUS_SPI)
-		register_spi_programmer(&spi_programmer_dummyflasher);
+		register_spi_master(&spi_master_dummyflasher);
 
 	return 0;
 }

flash.h

@@ -212,7 +212,7 @@ struct flashctx {
 	chipaddr virtual_memory;
 	/* Some flash devices have an additional register space. */
 	chipaddr virtual_registers;
-	struct registered_programmer *pgm;
+	struct registered_master *mst;
 };
 
 /* Timing used in probe routines. ZERO is -2 to differentiate between an unset
@@ -258,7 +258,7 @@ extern const char *chip_to_probe;
 void map_flash_registers(struct flashctx *flash);
 int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int erase_flash(struct flashctx *flash);
-int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *fill_flash, int force);
+int probe_flash(struct registered_master *mst, int startchip, struct flashctx *fill_flash, int force);
 int read_flash_to_file(struct flashctx *flash, const char *filename);
 char *extract_param(const char *const *haystack, const char *needle, const char *delim);
 int verify_range(struct flashctx *flash, const uint8_t *cmpbuf, unsigned int start, unsigned int len);

flashrom.c

@@ -454,7 +454,7 @@ int programmer_shutdown(void)
 	}
 
 	programmer_param = NULL;
-	registered_programmer_count = 0;
+	registered_master_count = 0;
 
 	return ret;
 }
@@ -474,43 +474,43 @@ void programmer_unmap_flash_region(void *virt_addr, size_t len)
 
 void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
 {
-	flash->pgm->par.chip_writeb(flash, val, addr);
+	flash->mst->par.chip_writeb(flash, val, addr);
 }
 
 void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr)
 {
-	flash->pgm->par.chip_writew(flash, val, addr);
+	flash->mst->par.chip_writew(flash, val, addr);
 }
 
 void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr)
 {
-	flash->pgm->par.chip_writel(flash, val, addr);
+	flash->mst->par.chip_writel(flash, val, addr);
 }
 
 void chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len)
 {
-	flash->pgm->par.chip_writen(flash, buf, addr, len);
+	flash->mst->par.chip_writen(flash, buf, addr, len);
 }
 
 uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr)
 {
-	return flash->pgm->par.chip_readb(flash, addr);
+	return flash->mst->par.chip_readb(flash, addr);
 }
 
 uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr)
 {
-	return flash->pgm->par.chip_readw(flash, addr);
+	return flash->mst->par.chip_readw(flash, addr);
 }
 
 uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr)
 {
-	return flash->pgm->par.chip_readl(flash, addr);
+	return flash->mst->par.chip_readl(flash, addr);
 }
 
 void chip_readn(const struct flashctx *flash, uint8_t *buf, chipaddr addr,
 		size_t len)
 {
-	flash->pgm->par.chip_readn(flash, buf, addr, len);
+	flash->mst->par.chip_readn(flash, buf, addr, len);
 }
 
 void programmer_delay(unsigned int usecs)
@@ -1049,7 +1049,7 @@ int check_max_decode(enum chipbustype buses, uint32_t size)
 	return 1;
 }
 
-int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *flash, int force)
+int probe_flash(struct registered_master *mst, int startchip, struct flashctx *flash, int force)
 {
 	const struct flashchip *chip;
 	unsigned long base = 0;
@@ -1061,7 +1061,7 @@ int probe_flash(struct registered_programmer *pgm, int startchip, struct flashct
 	for (chip = flashchips + startchip; chip && chip->name; chip++) {
 		if (chip_to_probe && strcmp(chip->name, chip_to_probe) != 0)
 			continue;
-		buses_common = pgm->buses_supported & chip->bustype;
+		buses_common = mst->buses_supported & chip->bustype;
 		if (!buses_common)
 			continue;
 		msg_gdbg("Probing for %s %s, %d kB: ", chip->vendor, chip->name, chip->total_size);
@@ -1080,7 +1080,7 @@ int probe_flash(struct registered_programmer *pgm, int startchip, struct flashct
 			exit(1);
 		}
 		memcpy(flash->chip, chip, sizeof(struct flashchip));
-		flash->pgm = pgm;
+		flash->mst = mst;
 
 		base = flashbase ? flashbase : (0xffffffff - size + 1);
 		flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size);
@@ -1098,7 +1098,7 @@ int probe_flash(struct registered_programmer *pgm, int startchip, struct flashct
 		 * If this is not the first chip found, accept it only if it is
 		 * a non-generic match. SFDP and CFI are generic matches.
 		 * startchip==0 means this call to probe_flash() is the first
-		 * one for this programmer interface and thus no other chip has
+		 * one for this programmer interface (master) and thus no other chip has
 		 * been found on this interface.
 		 */
 		if (startchip == 0 && flash->chip->model_id == SFDP_DEVICE_ID) {

ft2232_spi.c

@@ -146,7 +146,7 @@ static int ft2232_spi_send_command(struct flashctx *flash,
 				   const unsigned char *writearr,
 				   unsigned char *readarr);
 
-static const struct spi_programmer spi_programmer_ft2232 = {
+static const struct spi_master spi_master_ft2232 = {
 	.type		= SPI_CONTROLLER_FT2232,
 	.max_data_read	= 64 * 1024,
 	.max_data_write	= 256,
@@ -389,7 +389,7 @@ int ft2232_spi_init(void)
 		goto ftdi_err;
 	}
 
-	register_spi_programmer(&spi_programmer_ft2232);
+	register_spi_master(&spi_master_ft2232);
 
 	return 0;
 

gfxnvidia.c

@@ -66,7 +66,7 @@ static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val,
 				  chipaddr addr);
 static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash,
 				    const chipaddr addr);
-static const struct par_programmer par_programmer_gfxnvidia = {
+static const struct par_master par_master_gfxnvidia = {
 		.chip_readb		= gfxnvidia_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -107,7 +107,7 @@ int gfxnvidia_init(void)
 
 	/* Write/erase doesn't work. */
 	programmer_may_write = 0;
-	register_par_programmer(&par_programmer_gfxnvidia, BUS_PARALLEL);
+	register_par_master(&par_master_gfxnvidia, BUS_PARALLEL);
 
 	return 0;
 }

ichspi.c

@@ -640,7 +640,7 @@ static void ich_set_bbar(uint32_t min_addr)
 
 /* Read len bytes from the fdata/spid register into the data array.
  *
- * Note that using len > flash->pgm->spi.max_data_read will return garbage or
+ * Note that using len > flash->mst->spi.max_data_read will return garbage or
  * may even crash.
  */
 static void ich_read_data(uint8_t *data, int len, int reg0_off)
@@ -658,7 +658,7 @@ static void ich_read_data(uint8_t *data, int len, int reg0_off)
 
 /* Fill len bytes from the data array into the fdata/spid registers.
  *
- * Note that using len > flash->pgm->spi.max_data_write will trash the registers
+ * Note that using len > flash->mst->spi.max_data_write will trash the registers
  * following the data registers.
  */
 static void ich_fill_data(const uint8_t *data, int len, int reg0_off)
@@ -965,7 +965,7 @@ static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset,
 		      uint8_t datalength, uint8_t * data)
 {
 	/* max_data_read == max_data_write for all Intel/VIA SPI masters */
-	uint8_t maxlength = flash->pgm->spi.max_data_read;
+	uint8_t maxlength = flash->mst->spi.max_data_read;
 
 	if (ich_generation == CHIPSET_ICH_UNKNOWN) {
 		msg_perr("%s: unsupported chipset\n", __func__);
@@ -1307,7 +1307,7 @@ static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf,
 	REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS));
 
 	while (len > 0) {
-		block_len = min(len, flash->pgm->opaque.max_data_read);
+		block_len = min(len, flash->mst->opaque.max_data_read);
 		ich_hwseq_set_addr(addr);
 		hsfc = REGREAD16(ICH9_REG_HSFC);
 		hsfc &= ~HSFC_FCYCLE; /* set read operation */
@@ -1345,7 +1345,7 @@ static int ich_hwseq_write(struct flashctx *flash, const uint8_t *buf, unsigned
 
 	while (len > 0) {
 		ich_hwseq_set_addr(addr);
-		block_len = min(len, flash->pgm->opaque.max_data_write);
+		block_len = min(len, flash->mst->opaque.max_data_write);
 		ich_fill_data(buf, block_len, ICH9_REG_FDATA0);
 		hsfc = REGREAD16(ICH9_REG_HSFC);
 		hsfc &= ~HSFC_FCYCLE; /* clear operation */
@@ -1521,7 +1521,7 @@ static void ich9_set_pr(int i, int read_prot, int write_prot)
 	msg_gspew("resulted in 0x%08x.\n", mmio_readl(addr));
 }
 
-static const struct spi_programmer spi_programmer_ich7 = {
+static const struct spi_master spi_master_ich7 = {
 	.type = SPI_CONTROLLER_ICH7,
 	.max_data_read = 64,
 	.max_data_write = 64,
@@ -1532,7 +1532,7 @@ static const struct spi_programmer spi_programmer_ich7 = {
 	.write_aai = default_spi_write_aai,
 };
 
-static const struct spi_programmer spi_programmer_ich9 = {
+static const struct spi_master spi_master_ich9 = {
 	.type = SPI_CONTROLLER_ICH9,
 	.max_data_read = 64,
 	.max_data_write = 64,
@@ -1543,7 +1543,7 @@ static const struct spi_programmer spi_programmer_ich9 = {
 	.write_aai = default_spi_write_aai,
 };
 
-static const struct opaque_programmer opaque_programmer_ich_hwseq = {
+static const struct opaque_master opaque_master_ich_hwseq = {
 	.max_data_read = 64,
 	.max_data_write = 64,
 	.probe = ich_hwseq_probe,
@@ -1604,7 +1604,7 @@ int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_gen)
 		}
 		ich_init_opcodes();
 		ich_set_bbar(0);
-		register_spi_programmer(&spi_programmer_ich7);
+		register_spi_master(&spi_master_ich7);
 		break;
 	case CHIPSET_ICH8:
 	default:		/* Future version might behave the same */
@@ -1785,9 +1785,9 @@ int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_gen)
 			}
 			hwseq_data.size_comp0 = getFCBA_component_density(&desc, 0);
 			hwseq_data.size_comp1 = getFCBA_component_density(&desc, 1);
-			register_opaque_programmer(&opaque_programmer_ich_hwseq);
+			register_opaque_master(&opaque_master_ich_hwseq);
 		} else {
-			register_spi_programmer(&spi_programmer_ich9);
+			register_spi_master(&spi_master_ich9);
 		}
 		break;
 	}
@@ -1795,7 +1795,7 @@ int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_gen)
 	return 0;
 }
 
-static const struct spi_programmer spi_programmer_via = {
+static const struct spi_master spi_master_via = {
 	.type = SPI_CONTROLLER_VIA,
 	.max_data_read = 16,
 	.max_data_write = 16,
@@ -1818,7 +1818,7 @@ int via_init_spi(struct pci_dev *dev, uint32_t mmio_base)
 	/* Not sure if it speaks all these bus protocols. */
 	internal_buses_supported = BUS_LPC | BUS_FWH;
 	ich_generation = CHIPSET_ICH7;
-	register_spi_programmer(&spi_programmer_via);
+	register_spi_master(&spi_master_via);
 
 	msg_pdbg("0x00: 0x%04x     (SPIS)\n", mmio_readw(ich_spibar + 0));
 	msg_pdbg("0x02: 0x%04x     (SPIC)\n", mmio_readw(ich_spibar + 2));

internal.c

@@ -145,7 +145,7 @@ static uint32_t internal_chip_readl(const struct flashctx *flash,
 				    const chipaddr addr);
 static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,
 				const chipaddr addr, size_t len);
-static const struct par_programmer par_programmer_internal = {
+static const struct par_master par_master_internal = {
 		.chip_readb		= internal_chip_readb,
 		.chip_readw		= internal_chip_readw,
 		.chip_readl		= internal_chip_readl,
@@ -342,7 +342,7 @@ int internal_init(void)
 	}
 
 #if defined(__i386__) || defined(__x86_64__) || defined (__mips)
-	register_par_programmer(&par_programmer_internal, internal_buses_supported);
+	register_par_master(&par_master_internal, internal_buses_supported);
 	return 0;
 #else
 	msg_perr("Your platform is not supported yet for the internal "

it8212.c

@@ -38,7 +38,7 @@ const struct dev_entry devs_it8212[] = {
 
 static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
 static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr);
-static const struct par_programmer par_programmer_it8212 = {
+static const struct par_master par_master_it8212 = {
 		.chip_readb		= it8212_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -71,7 +71,7 @@ int it8212_init(void)
 	rpci_write_long(dev, PCI_ROM_ADDRESS, io_base_addr | 0x01);
 
 	max_rom_decode.parallel = IT8212_MEMMAP_SIZE;
-	register_par_programmer(&par_programmer_it8212, BUS_PARALLEL);
+	register_par_master(&par_master_it8212, BUS_PARALLEL);
 	return 0;
 }
 

it85spi.c

@@ -279,7 +279,7 @@ static int it85xx_spi_send_command(struct flashctx *flash,
 				   const unsigned char *writearr,
 				   unsigned char *readarr);
 
-static const struct spi_programmer spi_programmer_it85xx = {
+static const struct spi_master spi_master_it85xx = {
 	.type		= SPI_CONTROLLER_IT85XX,
 	.max_data_read	= 64,
 	.max_data_write	= 64,
@@ -315,7 +315,7 @@ int it85xx_spi_init(struct superio s)
 		 * a debug message about it.
 		 */
 		/* Set this as SPI controller. */
-		register_spi_programmer(&spi_programmer_it85xx);
+		register_spi_master(&spi_master_it85xx);
 	}
 	return ret;
 }

it87spi.c

@@ -111,7 +111,7 @@ static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf,
 static int it8716f_spi_chip_write_256(struct flashctx *flash, const uint8_t *buf,
 				      unsigned int start, unsigned int len);
 
-static const struct spi_programmer spi_programmer_it87xx = {
+static const struct spi_master spi_master_it87xx = {
 	.type		= SPI_CONTROLLER_IT87XX,
 	.max_data_read	= MAX_DATA_UNSPECIFIED,
 	.max_data_write	= MAX_DATA_UNSPECIFIED,
@@ -228,7 +228,7 @@ static uint16_t it87spi_probe(uint16_t port)
 	if (internal_buses_supported & BUS_SPI)
 		msg_pdbg("Overriding chipset SPI with IT87 SPI.\n");
 	/* FIXME: Add the SPI bus or replace the other buses with it? */
-	register_spi_programmer(&spi_programmer_it87xx);
+	register_spi_master(&spi_master_it87xx);
 	return 0;
 }
 

linux_spi.c

@@ -46,7 +46,7 @@ static int linux_spi_read(struct flashctx *flash, uint8_t *buf,
 static int linux_spi_write_256(struct flashctx *flash, const uint8_t *buf,
 			       unsigned int start, unsigned int len);
 
-static const struct spi_programmer spi_programmer_linux = {
+static const struct spi_master spi_master_linux = {
 	.type		= SPI_CONTROLLER_LINUX,
 	.max_data_read	= MAX_DATA_UNSPECIFIED, /* TODO? */
 	.max_data_write	= MAX_DATA_UNSPECIFIED, /* TODO? */
@@ -120,7 +120,7 @@ int linux_spi_init(void)
 		return 1;
 	}
 
-	register_spi_programmer(&spi_programmer_linux);
+	register_spi_master(&spi_master_linux);
 
 	return 0;
 }

mcp6x_spi.c

@@ -156,7 +156,7 @@ int mcp6x_spi_init(int want_spi)
 		 (status >> MCP6X_SPI_GRANT) & 0x1);
 	mcp_gpiostate = status & 0xff;
 
-	if (bitbang_spi_init(&bitbang_spi_master_mcp6x)) {
+	if (register_spi_bitbang_master(&bitbang_spi_master_mcp6x)) {
 		/* This should never happen. */
 		msg_perr("MCP6X bitbang SPI master init failed!\n");
 		return 1;