Commit 60dead4a authored by Tai-Hong Wu's avatar Tai-Hong Wu Committed by Stefan Tauner
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Fix wrong density encoding on Intel Silvermont


Silvermont (Bay Trail, Rangeley, Avoton) seems to still use the old
density encoding with 3 bits per chip. Documentation is unavailable
(held concealed by Intel) but thanks to the efforts of Tai-Hong
(Type) Wu the layout is clear now. This patch is based on his one
but solves the issue differently thus reducing the code complexity.

Corresponding to flashrom svn r1861.
Signed-off-by: default avatarTai-Hong Wu <thwu@lunartoday.com>
Signed-off-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: default avatarStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
parent 80e64715
...@@ -127,27 +127,27 @@ static const char *pprint_density(enum ich_chipset cs, const struct ich_descript ...@@ -127,27 +127,27 @@ static const char *pprint_density(enum ich_chipset cs, const struct ich_descript
case CHIPSET_ICH10: case CHIPSET_ICH10:
case CHIPSET_5_SERIES_IBEX_PEAK: case CHIPSET_5_SERIES_IBEX_PEAK:
case CHIPSET_6_SERIES_COUGAR_POINT: case CHIPSET_6_SERIES_COUGAR_POINT:
case CHIPSET_7_SERIES_PANTHER_POINT: { case CHIPSET_7_SERIES_PANTHER_POINT:
case CHIPSET_BAYTRAIL: {
uint8_t size_enc; uint8_t size_enc;
if (idx == 0) { if (idx == 0) {
size_enc = desc->component.old.comp1_density; size_enc = desc->component.dens_old.comp1_density;
} else { } else {
size_enc = desc->component.old.comp2_density; size_enc = desc->component.dens_old.comp2_density;
} }
if (size_enc > 5) if (size_enc > 5)
return "reserved"; return "reserved";
return size_str[size_enc]; return size_str[size_enc];
} }
case CHIPSET_8_SERIES_LYNX_POINT: case CHIPSET_8_SERIES_LYNX_POINT:
case CHIPSET_BAYTRAIL:
case CHIPSET_8_SERIES_LYNX_POINT_LP: case CHIPSET_8_SERIES_LYNX_POINT_LP:
case CHIPSET_8_SERIES_WELLSBURG: case CHIPSET_8_SERIES_WELLSBURG:
case CHIPSET_9_SERIES_WILDCAT_POINT: { case CHIPSET_9_SERIES_WILDCAT_POINT: {
uint8_t size_enc; uint8_t size_enc;
if (idx == 0) { if (idx == 0) {
size_enc = desc->component.new.comp1_density; size_enc = desc->component.dens_new.comp1_density;
} else { } else {
size_enc = desc->component.new.comp2_density; size_enc = desc->component.dens_new.comp2_density;
} }
if (size_enc > 7) if (size_enc > 7)
return "reserved"; return "reserved";
...@@ -207,16 +207,16 @@ void prettyprint_ich_descriptor_component(enum ich_chipset cs, const struct ich_ ...@@ -207,16 +207,16 @@ void prettyprint_ich_descriptor_component(enum ich_chipset cs, const struct ich_
msg_pdbg2("Component 2 density: %s\n", pprint_density(cs, desc, 1)); msg_pdbg2("Component 2 density: %s\n", pprint_density(cs, desc, 1));
else else
msg_pdbg2("Component 2 is not used.\n"); msg_pdbg2("Component 2 is not used.\n");
msg_pdbg2("Read Clock Frequency: %s\n", pprint_freq(cs, desc->component.common.freq_read)); msg_pdbg2("Read Clock Frequency: %s\n", pprint_freq(cs, desc->component.modes.freq_read));
msg_pdbg2("Read ID and Status Clock Freq.: %s\n", pprint_freq(cs, desc->component.common.freq_read_id)); msg_pdbg2("Read ID and Status Clock Freq.: %s\n", pprint_freq(cs, desc->component.modes.freq_read_id));
msg_pdbg2("Write and Erase Clock Freq.: %s\n", pprint_freq(cs, desc->component.common.freq_write)); msg_pdbg2("Write and Erase Clock Freq.: %s\n", pprint_freq(cs, desc->component.modes.freq_write));
msg_pdbg2("Fast Read is %ssupported.\n", desc->component.common.fastread ? "" : "not "); msg_pdbg2("Fast Read is %ssupported.\n", desc->component.modes.fastread ? "" : "not ");
if (desc->component.common.fastread) if (desc->component.modes.fastread)
msg_pdbg2("Fast Read Clock Frequency: %s\n", msg_pdbg2("Fast Read Clock Frequency: %s\n",
pprint_freq(cs, desc->component.common.freq_fastread)); pprint_freq(cs, desc->component.modes.freq_fastread));
if (cs > CHIPSET_6_SERIES_COUGAR_POINT) if (cs > CHIPSET_6_SERIES_COUGAR_POINT)
msg_pdbg2("Dual Output Fast Read Support: %sabled\n", msg_pdbg2("Dual Output Fast Read Support: %sabled\n",
desc->component.new.dual_output ? "dis" : "en"); desc->component.modes.dual_output ? "dis" : "en");
if (desc->component.FLILL == 0) if (desc->component.FLILL == 0)
msg_pdbg2("No forbidden opcodes.\n"); msg_pdbg2("No forbidden opcodes.\n");
else { else {
...@@ -816,22 +816,22 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors ...@@ -816,22 +816,22 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors
case CHIPSET_5_SERIES_IBEX_PEAK: case CHIPSET_5_SERIES_IBEX_PEAK:
case CHIPSET_6_SERIES_COUGAR_POINT: case CHIPSET_6_SERIES_COUGAR_POINT:
case CHIPSET_7_SERIES_PANTHER_POINT: case CHIPSET_7_SERIES_PANTHER_POINT:
case CHIPSET_BAYTRAIL:
if (idx == 0) { if (idx == 0) {
size_enc = desc->component.old.comp1_density; size_enc = desc->component.dens_old.comp1_density;
} else { } else {
size_enc = desc->component.old.comp2_density; size_enc = desc->component.dens_old.comp2_density;
} }
size_max = 5; size_max = 5;
break; break;
case CHIPSET_8_SERIES_LYNX_POINT: case CHIPSET_8_SERIES_LYNX_POINT:
case CHIPSET_BAYTRAIL:
case CHIPSET_8_SERIES_LYNX_POINT_LP: case CHIPSET_8_SERIES_LYNX_POINT_LP:
case CHIPSET_8_SERIES_WELLSBURG: case CHIPSET_8_SERIES_WELLSBURG:
case CHIPSET_9_SERIES_WILDCAT_POINT: case CHIPSET_9_SERIES_WILDCAT_POINT:
if (idx == 0) { if (idx == 0) {
size_enc = desc->component.new.comp1_density; size_enc = desc->component.dens_new.comp1_density;
} else { } else {
size_enc = desc->component.new.comp2_density; size_enc = desc->component.dens_new.comp2_density;
} }
size_max = 7; size_max = 7;
break; break;
...@@ -842,7 +842,7 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors ...@@ -842,7 +842,7 @@ int getFCBA_component_density(enum ich_chipset cs, const struct ich_descriptors
} }
if (size_enc > size_max) { if (size_enc > size_max) {
msg_perr("Density of ICH SPI component with index %d is invalid." msg_perr("Density of ICH SPI component with index %d is invalid.\n"
"Encoded density is 0x%x while maximum allowed is 0x%x.\n", "Encoded density is 0x%x while maximum allowed is 0x%x.\n",
idx, size_enc, size_max); idx, size_enc, size_max);
return -1; return -1;
......
...@@ -123,23 +123,19 @@ struct ich_desc_component { ...@@ -123,23 +123,19 @@ struct ich_desc_component {
freq_fastread :3, freq_fastread :3,
freq_write :3, freq_write :3,
freq_read_id :3, freq_read_id :3,
:2; dual_output :1, /* new since Cougar Point/6 */
} common; :1;
} modes;
struct { struct {
uint32_t comp1_density :3, uint32_t comp1_density :3,
comp2_density :3, comp2_density :3,
:11, :26;
:13, } dens_old;
:2;
} old;
struct { struct {
uint32_t comp1_density :4, /* new since Lynx Point/8 */ uint32_t comp1_density :4, /* new since Lynx Point/8 */
comp2_density :4, comp2_density :4,
:9, :24;
:13, } dens_new;
dual_output :1, /* new since Cougar Point/6 */
:1;
} new;
}; };
union { /* 0x04 */ union { /* 0x04 */
uint32_t FLILL; /* Flash Invalid Instructions Register */ uint32_t FLILL; /* Flash Invalid Instructions Register */
......
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