Activate proper support for EN29F002(A)(N)[BT]

Fully tested for Probe/Read/Erase/Write on EN29F002NT.
Jedec subroutines 'probe_jedec()' and 'erase_chip_jedec()'
are still in use, but a tailored 'write_en29f002a()' is
needed due to a byte wise writing mechanism for this chip.

Corresponding to flashrom svn r316 and coreboot v2 svn r3602.
Signed-off-by: Mats Erik Andersson <mats.andersson@gisladisker.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

Makefile

@@ -26,7 +26,7 @@ endif
 
 OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.o \
 	sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \
-	w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o \
+	w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o \
 	sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o \
 	flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \
 	ichspi.o w39v040c.o

en29f002a.c

@@ -19,12 +19,17 @@
  */
 
 /*
-   EN29F512 has 1C,21
-   EN29F010 has 1C,20
-   EN29F040A has 1C,04
-   EN29LV010 has 1C,6E and uses short F0 reset sequence
-   EN29LV040(A) has 1C,4F and uses short F0 reset sequence
+ * EN29F512 has 1C,21
+ * EN29F010 has 1C,20
+ * EN29F040A has 1C,04
+ * EN29LV010 has 1C,6E and uses short F0 reset sequence
+ * EN29LV040(A) has 1C,4F and uses short F0 reset sequence
  */
+
+#include <stdio.h>
+#include <stdint.h>
+#include "flash.h"
+
 int probe_en29f512(struct flashchip *flash)
 {
 	volatile uint8_t *bios = flash->virtual_memory;
@@ -53,9 +58,11 @@ int probe_en29f512(struct flashchip *flash)
 }
 
 /*
-   EN29F002AT has 1C,92
-   EN29F002AB has 1C,97
+ * EN29F002AT has 1C,92
+ * EN29F002AB has 1C,97
  */
+
+/* This does not seem to function properly for EN29F002NT. */
 int probe_en29f002a(struct flashchip *flash)
 {
 	volatile uint8_t *bios = flash->virtual_memory;
@@ -83,3 +90,35 @@ int probe_en29f002a(struct flashchip *flash)
 	return 0;
 }
 
+/* The EN29F002 chip needs repeated single byte writing, no block writing. */
+int write_en29f002a(struct flashchip *flash, uint8_t *buf)
+{
+	int i;
+	int total_size = flash->total_size * 1024;
+	volatile uint8_t *bios = flash->virtual_memory;
+	volatile uint8_t *dst = bios;
+
+	// *bios = 0xF0;
+	myusec_delay(10);
+	erase_chip_jedec(flash);
+
+	printf("Programming page: ");
+	for (i = 0; i < total_size; i++) {
+		/* write to the sector */
+		if ((i & 0xfff) == 0)
+			printf("address: 0x%08lx", (unsigned long)i);
+		*(bios + 0x5555) = 0xAA;
+		*(bios + 0x2AAA) = 0x55;
+		*(bios + 0x5555) = 0xA0;
+		*dst++ = *buf++;
+
+		/* wait for Toggle bit ready */
+		toggle_ready_jedec(dst);
+
+		if ((i & 0xfff) == 0)
+			printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
+	}
+
+	printf("\n");
+	return 0;
+}

flash.h

@@ -435,6 +435,11 @@ int probe_29f040b(struct flashchip *flash);
 int erase_29f040b(struct flashchip *flash);
 int write_29f040b(struct flashchip *flash, uint8_t *buf);
 
+/* en29f002a.c */
+int probe_en29f002a(struct flashchip *flash);
+int erase_en29f002a(struct flashchip *flash);
+int write_en29f002a(struct flashchip *flash, uint8_t *buf);
+
 /* ichspi.c */
 int ich_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr);
 int ich_spi_read(struct flashchip *flash, uint8_t * buf);

flashchips.c

@@ -47,8 +47,8 @@ struct flashchip flashchips[] = {
 	{"AMIC",	"A29040B",		AMIC_ID_NOPREFIX, AMIC_A29040B,		512,	64 * 1024,	TEST_OK_PR,	probe_29f040b,		erase_29f040b,			write_29f040b},
 	{"AMIC",	"A49LF040A",		AMIC_ID_NOPREFIX, AMIC_A49LF040A,	512,	64 * 1024,	TEST_OK_PREW,	probe_49fl00x,		erase_49fl00x,			write_49fl00x},
 	{"EMST",	"F49B002UA",		EMST_ID,	EMST_F49B002UA,		256,	4096,		TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_49f002},
-	{"EON",		"EN29F002(A)(N)B",	EON_ID,		EN_29F002B,		256,	256,		TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_jedec},
-	{"EON",		"EN29F002(A)(N)T",	EON_ID,		EN_29F002T,		256,	256,		TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_jedec},
+	{"EON",		"EN29F002(A)(N)B",	EON_ID,		EN_29F002B,		256,	256,		TEST_UNTESTED,	probe_jedec,		erase_chip_jedec,		write_en29f002a},
+	{"EON",		"EN29F002(A)(N)T",	EON_ID,		EN_29F002T,		256,	256,		TEST_OK_PREW,	probe_jedec,		erase_chip_jedec,		write_en29f002a},
 	{"Fujitsu",	"MBM29F400TC",		FUJITSU_ID,	MBM29F400TC_STRANGE,	512,	64 * 1024,	TEST_UNTESTED,	probe_m29f400bt,	erase_m29f400bt,		write_coreboot_m29f400bt},
 	{"Intel",	"82802AB",		INTEL_ID,	173,			512,	64 * 1024,	TEST_OK_PREW,	probe_82802ab,		erase_82802ab,			write_82802ab},
 	{"Intel",	"82802AC",		INTEL_ID,	172,			1024,	64 * 1024,	TEST_OK_PREW,	probe_82802ab,		erase_82802ab,			write_82802ab},