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Carl-Daniel Hailfinger authored
Use 16-bit values for bit masks in 16-bit registers. Check for SPI Cycle In Progress and wait up to 60 ms. Do not touch reserved bits. Reduce SPI cycle timeout from 60 s to 60 ms. Clear transaction errors caused by our own SPI accesses. Add better debugging in case the hardware misbehaves. Corresponding to flashrom svn r1281. Signed-off-by:
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by:
Stefan Reinauer <stefan.reinauer@coreboot.org>eacbd163