• Carl-Daniel Hailfinger's avatar
    Add SPI mode diagnostics for all post-MCP55 (nForce 5) chipsets from Nvidia · ea3b1b4d
    Carl-Daniel Hailfinger authored
    
    
    Huge thanks to Michael Karcher for reverse engineering the MCP67 chipset
    and writing a spec. Due to this, we were able to use the chinese wall
    technique for 100% clean room reverse engineering.
    
    This patch doesn't touch any of the new registers, it only reads them.
    Assuming that read has no side effects, this patch is a no-op and safe.
    
    We need "flashrom -V" output from all post-MCP55 (nForce 5) chipset
    boards. Please indicate if your board uses SPI flash or LPC flash (if
    you know it). Note: That output is only helpful if it is created with
    patched flashrom and if is from the first run of flashrom after a cold
    boot (reset or Ctrl-Alt-Del is not sufficient). There is a pattern based
    on which we can probably detect which flash type is present on the
    board.
    
    Thanks to Alessandro Polverini for testing earlier iterations of this
    patch.
    
    Note: The MCP67 should work. I guessed that the other recent Nvidia
    chipsets would work in a similar way, and created a simplified
    do-nothing catchall chipset enable function which dumps some info and
    instructs the user to send more info.
    
    Corresponding to flashrom svn r902.
    Signed-off-by: default avatarCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
    Acked-by: default avatarMichael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
    ea3b1b4d
chipset_enable.c 43.3 KB