1. 16 May, 2022 1 commit
  2. 15 May, 2022 1 commit
    • Raptor Engineering Development Team's avatar
      Add Tercel PHY reset synchronization · e134149f
      Raptor Engineering Development Team authored
      When the external peripheral reset pulse length is short
      compared to the PHY clock period, the power on reset
      may be missed leaving the PHY in an undefined state.
      
      Synchronize the external peripheral reset signal into
      the PHY clock domain to avoid this potential issue.
      e134149f
  3. 19 Apr, 2021 1 commit
  4. 17 Mar, 2021 1 commit
  5. 16 Mar, 2021 4 commits