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Kestrel Collaboration
Kestrel LiteX
migen
Commits
ede1c9e4
Commit
ede1c9e4
authored
6 years ago
by
Caleb Jamison
Committed by
Sébastien Bourdeauducq
6 years ago
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Add _connectors to constructor
parent
20d28d4c
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migen/build/platforms/arty_a7.py
migen/build/platforms/arty_a7.py
+1
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migen/build/platforms/arty_a7.py
View file @
ede1c9e4
...
@@ -150,7 +150,7 @@ class Platform(XilinxPlatform):
...
@@ -150,7 +150,7 @@ class Platform(XilinxPlatform):
default_clk_period
=
10.0
default_clk_period
=
10.0
def
__init__
(
self
,
toolchain
=
"vivado"
,
programmer
=
"vivado"
):
def
__init__
(
self
,
toolchain
=
"vivado"
,
programmer
=
"vivado"
):
XilinxPlatform
.
__init__
(
self
,
"XC7A35TICSG324-1L"
,
_io
,
XilinxPlatform
.
__init__
(
self
,
"XC7A35TICSG324-1L"
,
_io
,
_connectors
,
toolchain
=
toolchain
)
toolchain
=
toolchain
)
self
.
toolchain
.
bitstream_commands
=
\
self
.
toolchain
.
bitstream_commands
=
\
[
"set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]"
]
[
"set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]"
]
...
...
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