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Kestrel Collaboration
Kestrel LiteX
migen
Commits
55859128
Commit
55859128
authored
5 years ago
by
Sebastien Bourdeauducq
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cdc: avoid race between data and request in BusSynchronizer
parent
f4979a24
Changes
1
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1 changed file
with
6 additions
and
2 deletions
+6
-2
migen/genlib/cdc.py
migen/genlib/cdc.py
+6
-2
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migen/genlib/cdc.py
View file @
55859128
...
@@ -101,13 +101,17 @@ class BusSynchronizer(Module):
...
@@ -101,13 +101,17 @@ class BusSynchronizer(Module):
starter
=
Signal
(
reset
=
1
)
starter
=
Signal
(
reset
=
1
)
sync_i
+=
starter
.
eq
(
0
)
sync_i
+=
starter
.
eq
(
0
)
self
.
submodules
.
_ping
=
PulseSynchronizer
(
idomain
,
odomain
)
self
.
submodules
.
_ping
=
PulseSynchronizer
(
idomain
,
odomain
)
# Extra flop on i->o to avoid race between data and request
# https://github.com/m-labs/nmigen/pull/40#issuecomment-484166790
ping_o
=
Signal
()
sync_o
+=
ping_o
.
eq
(
self
.
_ping
.
o
)
self
.
submodules
.
_pong
=
PulseSynchronizer
(
odomain
,
idomain
)
self
.
submodules
.
_pong
=
PulseSynchronizer
(
odomain
,
idomain
)
self
.
submodules
.
_timeout
=
ClockDomainsRenamer
(
idomain
)(
self
.
submodules
.
_timeout
=
ClockDomainsRenamer
(
idomain
)(
WaitTimer
(
timeout
))
WaitTimer
(
timeout
))
self
.
comb
+=
[
self
.
comb
+=
[
self
.
_timeout
.
wait
.
eq
(
~
self
.
_ping
.
i
),
self
.
_timeout
.
wait
.
eq
(
~
self
.
_ping
.
i
),
self
.
_ping
.
i
.
eq
(
starter
|
self
.
_pong
.
o
|
self
.
_timeout
.
done
),
self
.
_ping
.
i
.
eq
(
starter
|
self
.
_pong
.
o
|
self
.
_timeout
.
done
),
self
.
_pong
.
i
.
eq
(
self
.
_
ping
.
o
)
self
.
_pong
.
i
.
eq
(
ping
_
o
)
]
]
ibuffer
=
Signal
(
width
,
reset_less
=
True
)
ibuffer
=
Signal
(
width
,
reset_less
=
True
)
...
@@ -115,7 +119,7 @@ class BusSynchronizer(Module):
...
@@ -115,7 +119,7 @@ class BusSynchronizer(Module):
sync_i
+=
If
(
self
.
_pong
.
o
,
ibuffer
.
eq
(
self
.
i
))
sync_i
+=
If
(
self
.
_pong
.
o
,
ibuffer
.
eq
(
self
.
i
))
ibuffer
.
attr
.
add
(
"no_retiming"
)
ibuffer
.
attr
.
add
(
"no_retiming"
)
self
.
specials
+=
MultiReg
(
ibuffer
,
obuffer
,
odomain
)
self
.
specials
+=
MultiReg
(
ibuffer
,
obuffer
,
odomain
)
sync_o
+=
If
(
self
.
_
ping
.
o
,
self
.
o
.
eq
(
obuffer
))
sync_o
+=
If
(
ping
_
o
,
self
.
o
.
eq
(
obuffer
))
class
BlindTransfer
(
Module
):
class
BlindTransfer
(
Module
):
...
...
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