1. 22 Jun, 2022 1 commit
    • Martí Bolívar's avatar
      civetweb: remove obsolete code · f49d11d3
      Martí Bolívar authored
      This code has gone unmaintained and bugs continue to be reported
      against it. We do not have the resources as a project to maintain this
      in "odd fixes" mode, and nobody has stepped up to maintain it [1], so
      sadly this must be removed for now.
      
      If anyone would like to see civetweb supported in upstream Zephyr
      again, they are welcome to add it back, as long as they promise to
      maintain it going forward.
      
      Many thanks to everyone who has contributed to civetweb support in
      Zephyr while it was here. So long and thanks for all the fish.
      
      Fixes: #45807
      Fixes: #43910
      Fixes: #34226
      Fixes: #46743
      
      [1] https://lists.zephyrproject.org/g/devel/message/8466
      
      Signed-off-by: default avatarMartí Bolívar <marti.bolivar@nordicsemi.no>
      f49d11d3
  2. 13 Jun, 2022 1 commit
  3. 07 Jun, 2022 1 commit
  4. 06 Jun, 2022 1 commit
    • Piotr Dymacz's avatar
      drivers: flash: introduce on-chip flash driver for TI CC13xx/CC26xx · 360d70a9
      Piotr Dymacz authored
      
      This includes a basic driver for built-in flash on the Texas Intruments
      SimpleLink CC13xx/CC26xx SoC series.
      
      The driver makes use of driverlib HAL from TI's SDK and was tested on
      two LaunchXL development boards with CC1352R and CC2652R SoCs:
      
      - CC1352R1 LaunchXL
      - CC26x2R1 LaunchXL
      
      Tests were done using:
      
      - flash shell sample (samples/drivers/flash_shell)
      - littlefs filesystem sample (samples/subsys/fs/littlefs)*
      - MCUboot (bootloader/mcuboot/boot/zephyr)*
      
        * additional changes in DTS for the boards were required (partitions
          table) and are not part of this changeset (will be introduced later)
      
      Some additional information about the implementation:
      
      1. TI's Technical Reference Manual for CC13x2 and CC26x2 points out that
         "An individual 64-bit word can be programmed to change bits 1 to 0"
         but it seems this 'alignment' requirement is handled internally by
         the ROM function and thus 'write-block-size' is set to 1.
      
      2. Interrupts, VIMS and line buffers are disabled during flash content
         update (write or erase) and restored afterwards as recommended by TI.
      
      3. Only RAM to flash write is supported (source of data to be written to
         flash can't point to flash).
      
      4. The driver doesn't take care of flash sector protection disable as
         that functionality is handled by CCFG. Write or erase requests which
         refer to a protected area will fail.
      Signed-off-by: default avatarPiotr Dymacz <pepe2k@gmail.com>
      360d70a9
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